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@@ -38,16 +38,15 @@
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#include <linux/nmi.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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+#ifdef CONFIG_SPARC
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+#include <linux/sunserialcore.h>
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+#endif
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#include <asm/io.h>
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#include <asm/irq.h>
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#include "8250.h"
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-#ifdef CONFIG_SPARC
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-#include "../suncore.h"
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-#endif
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-
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/*
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* Configuration:
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* share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
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@@ -86,13 +85,6 @@ static unsigned int skip_txen_test; /* force skip of txen test at init time */
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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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-/*
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- * We default to IRQ0 for the "no irq" hack. Some
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- * machine types want others as well - they're free
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- * to redefine this in their header file.
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- */
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-#define is_real_interrupt(irq) ((irq) != 0)
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-
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#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
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#define CONFIG_SERIAL_DETECT_IRQ 1
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#endif
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@@ -475,9 +467,8 @@ static void set_io_from_upio(struct uart_port *p)
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}
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static void
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-serial_out_sync(struct uart_8250_port *up, int offset, int value)
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+serial_port_out_sync(struct uart_port *p, int offset, int value)
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{
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- struct uart_port *p = &up->port;
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switch (p->iotype) {
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case UPIO_MEM:
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case UPIO_MEM32:
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@@ -490,30 +481,17 @@ serial_out_sync(struct uart_8250_port *up, int offset, int value)
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}
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}
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-#define serial_in(up, offset) \
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- (up->port.serial_in(&(up)->port, (offset)))
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-#define serial_out(up, offset, value) \
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- (up->port.serial_out(&(up)->port, (offset), (value)))
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-/*
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- * We used to support using pause I/O for certain machines. We
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- * haven't supported this for a while, but just in case it's badly
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- * needed for certain old 386 machines, I've left these #define's
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- * in....
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- */
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-#define serial_inp(up, offset) serial_in(up, offset)
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-#define serial_outp(up, offset, value) serial_out(up, offset, value)
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-
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/* Uart divisor latch read */
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static inline int _serial_dl_read(struct uart_8250_port *up)
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{
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- return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
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+ return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
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}
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/* Uart divisor latch write */
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static inline void _serial_dl_write(struct uart_8250_port *up, int value)
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{
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- serial_outp(up, UART_DLL, value & 0xff);
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- serial_outp(up, UART_DLM, value >> 8 & 0xff);
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+ serial_out(up, UART_DLL, value & 0xff);
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+ serial_out(up, UART_DLM, value >> 8 & 0xff);
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}
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#if defined(CONFIG_MIPS_ALCHEMY)
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@@ -583,10 +561,10 @@ static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
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static void serial8250_clear_fifos(struct uart_8250_port *p)
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{
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if (p->capabilities & UART_CAP_FIFO) {
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- serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
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- serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
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+ serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
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+ serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
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UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
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- serial_outp(p, UART_FCR, 0);
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+ serial_out(p, UART_FCR, 0);
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}
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}
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@@ -599,15 +577,15 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
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{
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if (p->capabilities & UART_CAP_SLEEP) {
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if (p->capabilities & UART_CAP_EFR) {
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- serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
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- serial_outp(p, UART_EFR, UART_EFR_ECB);
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- serial_outp(p, UART_LCR, 0);
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+ serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
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+ serial_out(p, UART_EFR, UART_EFR_ECB);
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+ serial_out(p, UART_LCR, 0);
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}
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- serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
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+ serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
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if (p->capabilities & UART_CAP_EFR) {
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- serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
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- serial_outp(p, UART_EFR, 0);
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- serial_outp(p, UART_LCR, 0);
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+ serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
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+ serial_out(p, UART_EFR, 0);
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+ serial_out(p, UART_LCR, 0);
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}
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}
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}
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@@ -622,12 +600,12 @@ static int __enable_rsa(struct uart_8250_port *up)
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unsigned char mode;
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int result;
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- mode = serial_inp(up, UART_RSA_MSR);
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+ mode = serial_in(up, UART_RSA_MSR);
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result = mode & UART_RSA_MSR_FIFO;
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if (!result) {
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- serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
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- mode = serial_inp(up, UART_RSA_MSR);
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+ serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
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+ mode = serial_in(up, UART_RSA_MSR);
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result = mode & UART_RSA_MSR_FIFO;
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}
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@@ -646,7 +624,7 @@ static void enable_rsa(struct uart_8250_port *up)
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spin_unlock_irq(&up->port.lock);
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}
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if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
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- serial_outp(up, UART_RSA_FRR, 0);
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+ serial_out(up, UART_RSA_FRR, 0);
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}
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}
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@@ -665,12 +643,12 @@ static void disable_rsa(struct uart_8250_port *up)
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up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
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spin_lock_irq(&up->port.lock);
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- mode = serial_inp(up, UART_RSA_MSR);
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+ mode = serial_in(up, UART_RSA_MSR);
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result = !(mode & UART_RSA_MSR_FIFO);
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if (!result) {
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- serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
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- mode = serial_inp(up, UART_RSA_MSR);
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+ serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
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+ mode = serial_in(up, UART_RSA_MSR);
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result = !(mode & UART_RSA_MSR_FIFO);
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}
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@@ -691,28 +669,28 @@ static int size_fifo(struct uart_8250_port *up)
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unsigned short old_dl;
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int count;
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- old_lcr = serial_inp(up, UART_LCR);
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- serial_outp(up, UART_LCR, 0);
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- old_fcr = serial_inp(up, UART_FCR);
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- old_mcr = serial_inp(up, UART_MCR);
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- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
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+ old_lcr = serial_in(up, UART_LCR);
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+ serial_out(up, UART_LCR, 0);
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+ old_fcr = serial_in(up, UART_FCR);
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+ old_mcr = serial_in(up, UART_MCR);
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+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
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UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
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- serial_outp(up, UART_MCR, UART_MCR_LOOP);
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- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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+ serial_out(up, UART_MCR, UART_MCR_LOOP);
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+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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old_dl = serial_dl_read(up);
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serial_dl_write(up, 0x0001);
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- serial_outp(up, UART_LCR, 0x03);
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+ serial_out(up, UART_LCR, 0x03);
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for (count = 0; count < 256; count++)
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- serial_outp(up, UART_TX, count);
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+ serial_out(up, UART_TX, count);
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mdelay(20);/* FIXME - schedule_timeout */
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- for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
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+ for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
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(count < 256); count++)
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- serial_inp(up, UART_RX);
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- serial_outp(up, UART_FCR, old_fcr);
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- serial_outp(up, UART_MCR, old_mcr);
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- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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+ serial_in(up, UART_RX);
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+ serial_out(up, UART_FCR, old_fcr);
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+ serial_out(up, UART_MCR, old_mcr);
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+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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serial_dl_write(up, old_dl);
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- serial_outp(up, UART_LCR, old_lcr);
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+ serial_out(up, UART_LCR, old_lcr);
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return count;
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}
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@@ -727,20 +705,20 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
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unsigned char old_dll, old_dlm, old_lcr;
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unsigned int id;
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- old_lcr = serial_inp(p, UART_LCR);
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- serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A);
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+ old_lcr = serial_in(p, UART_LCR);
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+ serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
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- old_dll = serial_inp(p, UART_DLL);
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- old_dlm = serial_inp(p, UART_DLM);
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+ old_dll = serial_in(p, UART_DLL);
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+ old_dlm = serial_in(p, UART_DLM);
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- serial_outp(p, UART_DLL, 0);
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- serial_outp(p, UART_DLM, 0);
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+ serial_out(p, UART_DLL, 0);
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+ serial_out(p, UART_DLM, 0);
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- id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
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+ id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
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- serial_outp(p, UART_DLL, old_dll);
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- serial_outp(p, UART_DLM, old_dlm);
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- serial_outp(p, UART_LCR, old_lcr);
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+ serial_out(p, UART_DLL, old_dll);
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+ serial_out(p, UART_DLM, old_dlm);
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+ serial_out(p, UART_LCR, old_lcr);
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return id;
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}
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@@ -850,11 +828,11 @@ static void autoconfig_8250(struct uart_8250_port *up)
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up->port.type = PORT_8250;
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scratch = serial_in(up, UART_SCR);
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- serial_outp(up, UART_SCR, 0xa5);
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+ serial_out(up, UART_SCR, 0xa5);
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status1 = serial_in(up, UART_SCR);
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- serial_outp(up, UART_SCR, 0x5a);
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+ serial_out(up, UART_SCR, 0x5a);
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status2 = serial_in(up, UART_SCR);
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- serial_outp(up, UART_SCR, scratch);
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+ serial_out(up, UART_SCR, scratch);
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if (status1 == 0xa5 && status2 == 0x5a)
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up->port.type = PORT_16450;
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@@ -885,7 +863,7 @@ static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
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} else {
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status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
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status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
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- serial_outp(up, 0x04, status);
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+ serial_out(up, 0x04, status);
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}
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return 1;
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}
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@@ -908,9 +886,9 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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* Check for presence of the EFR when DLAB is set.
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* Only ST16C650V1 UARTs pass this test.
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*/
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- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
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+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
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if (serial_in(up, UART_EFR) == 0) {
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- serial_outp(up, UART_EFR, 0xA8);
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+ serial_out(up, UART_EFR, 0xA8);
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if (serial_in(up, UART_EFR) != 0) {
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DEBUG_AUTOCONF("EFRv1 ");
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up->port.type = PORT_16650;
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@@ -918,7 +896,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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} else {
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DEBUG_AUTOCONF("Motorola 8xxx DUART ");
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}
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- serial_outp(up, UART_EFR, 0);
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+ serial_out(up, UART_EFR, 0);
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return;
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}
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@@ -926,7 +904,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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* Maybe it requires 0xbf to be written to the LCR.
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* (other ST16C650V2 UARTs, TI16C752A, etc)
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*/
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- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
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if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
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DEBUG_AUTOCONF("EFRv2 ");
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autoconfig_has_efr(up);
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@@ -940,23 +918,23 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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* switch back to bank 2, read it from EXCR1 again and check
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* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
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*/
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- serial_outp(up, UART_LCR, 0);
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+ serial_out(up, UART_LCR, 0);
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status1 = serial_in(up, UART_MCR);
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- serial_outp(up, UART_LCR, 0xE0);
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+ serial_out(up, UART_LCR, 0xE0);
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status2 = serial_in(up, 0x02); /* EXCR1 */
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if (!((status2 ^ status1) & UART_MCR_LOOP)) {
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- serial_outp(up, UART_LCR, 0);
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- serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
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- serial_outp(up, UART_LCR, 0xE0);
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+ serial_out(up, UART_LCR, 0);
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+ serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
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+ serial_out(up, UART_LCR, 0xE0);
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status2 = serial_in(up, 0x02); /* EXCR1 */
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- serial_outp(up, UART_LCR, 0);
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- serial_outp(up, UART_MCR, status1);
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+ serial_out(up, UART_LCR, 0);
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+ serial_out(up, UART_MCR, status1);
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if ((status2 ^ status1) & UART_MCR_LOOP) {
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unsigned short quot;
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- serial_outp(up, UART_LCR, 0xE0);
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+ serial_out(up, UART_LCR, 0xE0);
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quot = serial_dl_read(up);
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quot <<= 3;
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@@ -964,7 +942,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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if (ns16550a_goto_highspeed(up))
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serial_dl_write(up, quot);
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- serial_outp(up, UART_LCR, 0);
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+ serial_out(up, UART_LCR, 0);
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up->port.uartclk = 921600*16;
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up->port.type = PORT_NS16550A;
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@@ -979,15 +957,15 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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* Try setting it with and without DLAB set. Cheap clones
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* set bit 5 without DLAB set.
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*/
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- serial_outp(up, UART_LCR, 0);
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- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
|
|
|
+ serial_out(up, UART_LCR, 0);
|
|
|
+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
|
|
|
status1 = serial_in(up, UART_IIR) >> 5;
|
|
|
- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
|
|
- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
|
|
|
+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
|
|
|
+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
|
|
|
status2 = serial_in(up, UART_IIR) >> 5;
|
|
|
- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
- serial_outp(up, UART_LCR, 0);
|
|
|
+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
+ serial_out(up, UART_LCR, 0);
|
|
|
|
|
|
DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
|
|
|
|
|
|
@@ -1006,13 +984,13 @@ static void autoconfig_16550a(struct uart_8250_port *up)
|
|
|
* already a 1 and maybe locked there before we even start start.
|
|
|
*/
|
|
|
iersave = serial_in(up, UART_IER);
|
|
|
- serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
|
|
|
+ serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
|
|
|
if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
|
|
|
/*
|
|
|
* OK it's in a known zero state, try writing and reading
|
|
|
* without disturbing the current state of the other bits.
|
|
|
*/
|
|
|
- serial_outp(up, UART_IER, iersave | UART_IER_UUE);
|
|
|
+ serial_out(up, UART_IER, iersave | UART_IER_UUE);
|
|
|
if (serial_in(up, UART_IER) & UART_IER_UUE) {
|
|
|
/*
|
|
|
* It's an Xscale.
|
|
|
@@ -1030,7 +1008,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
|
|
|
*/
|
|
|
DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
|
|
|
}
|
|
|
- serial_outp(up, UART_IER, iersave);
|
|
|
+ serial_out(up, UART_IER, iersave);
|
|
|
|
|
|
/*
|
|
|
* Exar uarts have EFR in a weird location
|
|
|
@@ -1061,24 +1039,25 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
{
|
|
|
unsigned char status1, scratch, scratch2, scratch3;
|
|
|
unsigned char save_lcr, save_mcr;
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
unsigned long flags;
|
|
|
|
|
|
- if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
|
|
|
+ if (!port->iobase && !port->mapbase && !port->membase)
|
|
|
return;
|
|
|
|
|
|
DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
|
|
|
- serial_index(&up->port), up->port.iobase, up->port.membase);
|
|
|
+ serial_index(port), port->iobase, port->membase);
|
|
|
|
|
|
/*
|
|
|
* We really do need global IRQs disabled here - we're going to
|
|
|
* be frobbing the chips IRQ enable register to see if it exists.
|
|
|
*/
|
|
|
- spin_lock_irqsave(&up->port.lock, flags);
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
|
|
|
up->capabilities = 0;
|
|
|
up->bugs = 0;
|
|
|
|
|
|
- if (!(up->port.flags & UPF_BUGGY_UART)) {
|
|
|
+ if (!(port->flags & UPF_BUGGY_UART)) {
|
|
|
/*
|
|
|
* Do a simple existence test first; if we fail this,
|
|
|
* there's no point trying anything else.
|
|
|
@@ -1092,8 +1071,8 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
* Note: this is safe as long as MCR bit 4 is clear
|
|
|
* and the device is in "PC" mode.
|
|
|
*/
|
|
|
- scratch = serial_inp(up, UART_IER);
|
|
|
- serial_outp(up, UART_IER, 0);
|
|
|
+ scratch = serial_in(up, UART_IER);
|
|
|
+ serial_out(up, UART_IER, 0);
|
|
|
#ifdef __i386__
|
|
|
outb(0xff, 0x080);
|
|
|
#endif
|
|
|
@@ -1101,13 +1080,13 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
* Mask out IER[7:4] bits for test as some UARTs (e.g. TL
|
|
|
* 16C754B) allow only to modify them if an EFR bit is set.
|
|
|
*/
|
|
|
- scratch2 = serial_inp(up, UART_IER) & 0x0f;
|
|
|
- serial_outp(up, UART_IER, 0x0F);
|
|
|
+ scratch2 = serial_in(up, UART_IER) & 0x0f;
|
|
|
+ serial_out(up, UART_IER, 0x0F);
|
|
|
#ifdef __i386__
|
|
|
outb(0, 0x080);
|
|
|
#endif
|
|
|
- scratch3 = serial_inp(up, UART_IER) & 0x0f;
|
|
|
- serial_outp(up, UART_IER, scratch);
|
|
|
+ scratch3 = serial_in(up, UART_IER) & 0x0f;
|
|
|
+ serial_out(up, UART_IER, scratch);
|
|
|
if (scratch2 != 0 || scratch3 != 0x0F) {
|
|
|
/*
|
|
|
* We failed; there's nothing here
|
|
|
@@ -1130,10 +1109,10 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
* manufacturer would be stupid enough to design a board
|
|
|
* that conflicts with COM 1-4 --- we hope!
|
|
|
*/
|
|
|
- if (!(up->port.flags & UPF_SKIP_TEST)) {
|
|
|
- serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
|
|
|
- status1 = serial_inp(up, UART_MSR) & 0xF0;
|
|
|
- serial_outp(up, UART_MCR, save_mcr);
|
|
|
+ if (!(port->flags & UPF_SKIP_TEST)) {
|
|
|
+ serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
|
|
|
+ status1 = serial_in(up, UART_MSR) & 0xF0;
|
|
|
+ serial_out(up, UART_MCR, save_mcr);
|
|
|
if (status1 != 0x90) {
|
|
|
DEBUG_AUTOCONF("LOOP test failed (%02x) ",
|
|
|
status1);
|
|
|
@@ -1150,11 +1129,11 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
* We also initialise the EFR (if any) to zero for later. The
|
|
|
* EFR occupies the same register location as the FCR and IIR.
|
|
|
*/
|
|
|
- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
|
|
- serial_outp(up, UART_EFR, 0);
|
|
|
- serial_outp(up, UART_LCR, 0);
|
|
|
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
|
|
+ serial_out(up, UART_EFR, 0);
|
|
|
+ serial_out(up, UART_LCR, 0);
|
|
|
|
|
|
- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
+ serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
scratch = serial_in(up, UART_IIR) >> 6;
|
|
|
|
|
|
DEBUG_AUTOCONF("iir=%d ", scratch);
|
|
|
@@ -1164,10 +1143,10 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
autoconfig_8250(up);
|
|
|
break;
|
|
|
case 1:
|
|
|
- up->port.type = PORT_UNKNOWN;
|
|
|
+ port->type = PORT_UNKNOWN;
|
|
|
break;
|
|
|
case 2:
|
|
|
- up->port.type = PORT_16550;
|
|
|
+ port->type = PORT_16550;
|
|
|
break;
|
|
|
case 3:
|
|
|
autoconfig_16550a(up);
|
|
|
@@ -1178,102 +1157,102 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
|
|
|
/*
|
|
|
* Only probe for RSA ports if we got the region.
|
|
|
*/
|
|
|
- if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
|
|
|
+ if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
|
|
|
int i;
|
|
|
|
|
|
for (i = 0 ; i < probe_rsa_count; ++i) {
|
|
|
- if (probe_rsa[i] == up->port.iobase &&
|
|
|
- __enable_rsa(up)) {
|
|
|
- up->port.type = PORT_RSA;
|
|
|
+ if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
|
|
|
+ port->type = PORT_RSA;
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
- serial_outp(up, UART_LCR, save_lcr);
|
|
|
+ serial_out(up, UART_LCR, save_lcr);
|
|
|
|
|
|
- if (up->capabilities != uart_config[up->port.type].flags) {
|
|
|
+ if (up->capabilities != uart_config[port->type].flags) {
|
|
|
printk(KERN_WARNING
|
|
|
"ttyS%d: detected caps %08x should be %08x\n",
|
|
|
- serial_index(&up->port), up->capabilities,
|
|
|
- uart_config[up->port.type].flags);
|
|
|
+ serial_index(port), up->capabilities,
|
|
|
+ uart_config[port->type].flags);
|
|
|
}
|
|
|
|
|
|
- up->port.fifosize = uart_config[up->port.type].fifo_size;
|
|
|
- up->capabilities = uart_config[up->port.type].flags;
|
|
|
- up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
|
|
|
+ port->fifosize = uart_config[up->port.type].fifo_size;
|
|
|
+ up->capabilities = uart_config[port->type].flags;
|
|
|
+ up->tx_loadsz = uart_config[port->type].tx_loadsz;
|
|
|
|
|
|
- if (up->port.type == PORT_UNKNOWN)
|
|
|
+ if (port->type == PORT_UNKNOWN)
|
|
|
goto out;
|
|
|
|
|
|
/*
|
|
|
* Reset the UART.
|
|
|
*/
|
|
|
#ifdef CONFIG_SERIAL_8250_RSA
|
|
|
- if (up->port.type == PORT_RSA)
|
|
|
- serial_outp(up, UART_RSA_FRR, 0);
|
|
|
+ if (port->type == PORT_RSA)
|
|
|
+ serial_out(up, UART_RSA_FRR, 0);
|
|
|
#endif
|
|
|
- serial_outp(up, UART_MCR, save_mcr);
|
|
|
+ serial_out(up, UART_MCR, save_mcr);
|
|
|
serial8250_clear_fifos(up);
|
|
|
serial_in(up, UART_RX);
|
|
|
if (up->capabilities & UART_CAP_UUE)
|
|
|
- serial_outp(up, UART_IER, UART_IER_UUE);
|
|
|
+ serial_out(up, UART_IER, UART_IER_UUE);
|
|
|
else
|
|
|
- serial_outp(up, UART_IER, 0);
|
|
|
+ serial_out(up, UART_IER, 0);
|
|
|
|
|
|
out:
|
|
|
- spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
- DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
+ DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
|
|
|
}
|
|
|
|
|
|
static void autoconfig_irq(struct uart_8250_port *up)
|
|
|
{
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
unsigned char save_mcr, save_ier;
|
|
|
unsigned char save_ICP = 0;
|
|
|
unsigned int ICP = 0;
|
|
|
unsigned long irqs;
|
|
|
int irq;
|
|
|
|
|
|
- if (up->port.flags & UPF_FOURPORT) {
|
|
|
- ICP = (up->port.iobase & 0xfe0) | 0x1f;
|
|
|
+ if (port->flags & UPF_FOURPORT) {
|
|
|
+ ICP = (port->iobase & 0xfe0) | 0x1f;
|
|
|
save_ICP = inb_p(ICP);
|
|
|
outb_p(0x80, ICP);
|
|
|
- (void) inb_p(ICP);
|
|
|
+ inb_p(ICP);
|
|
|
}
|
|
|
|
|
|
/* forget possible initially masked and pending IRQ */
|
|
|
probe_irq_off(probe_irq_on());
|
|
|
- save_mcr = serial_inp(up, UART_MCR);
|
|
|
- save_ier = serial_inp(up, UART_IER);
|
|
|
- serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
|
|
|
+ save_mcr = serial_in(up, UART_MCR);
|
|
|
+ save_ier = serial_in(up, UART_IER);
|
|
|
+ serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
|
|
|
|
|
|
irqs = probe_irq_on();
|
|
|
- serial_outp(up, UART_MCR, 0);
|
|
|
+ serial_out(up, UART_MCR, 0);
|
|
|
udelay(10);
|
|
|
- if (up->port.flags & UPF_FOURPORT) {
|
|
|
- serial_outp(up, UART_MCR,
|
|
|
+ if (port->flags & UPF_FOURPORT) {
|
|
|
+ serial_out(up, UART_MCR,
|
|
|
UART_MCR_DTR | UART_MCR_RTS);
|
|
|
} else {
|
|
|
- serial_outp(up, UART_MCR,
|
|
|
+ serial_out(up, UART_MCR,
|
|
|
UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
|
|
|
}
|
|
|
- serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
|
|
|
- (void)serial_inp(up, UART_LSR);
|
|
|
- (void)serial_inp(up, UART_RX);
|
|
|
- (void)serial_inp(up, UART_IIR);
|
|
|
- (void)serial_inp(up, UART_MSR);
|
|
|
- serial_outp(up, UART_TX, 0xFF);
|
|
|
+ serial_out(up, UART_IER, 0x0f); /* enable all intrs */
|
|
|
+ serial_in(up, UART_LSR);
|
|
|
+ serial_in(up, UART_RX);
|
|
|
+ serial_in(up, UART_IIR);
|
|
|
+ serial_in(up, UART_MSR);
|
|
|
+ serial_out(up, UART_TX, 0xFF);
|
|
|
udelay(20);
|
|
|
irq = probe_irq_off(irqs);
|
|
|
|
|
|
- serial_outp(up, UART_MCR, save_mcr);
|
|
|
- serial_outp(up, UART_IER, save_ier);
|
|
|
+ serial_out(up, UART_MCR, save_mcr);
|
|
|
+ serial_out(up, UART_IER, save_ier);
|
|
|
|
|
|
- if (up->port.flags & UPF_FOURPORT)
|
|
|
+ if (port->flags & UPF_FOURPORT)
|
|
|
outb_p(save_ICP, ICP);
|
|
|
|
|
|
- up->port.irq = (irq > 0) ? irq : 0;
|
|
|
+ port->irq = (irq > 0) ? irq : 0;
|
|
|
}
|
|
|
|
|
|
static inline void __stop_tx(struct uart_8250_port *p)
|
|
|
@@ -1294,7 +1273,7 @@ static void serial8250_stop_tx(struct uart_port *port)
|
|
|
/*
|
|
|
* We really want to stop the transmitter from sending.
|
|
|
*/
|
|
|
- if (up->port.type == PORT_16C950) {
|
|
|
+ if (port->type == PORT_16C950) {
|
|
|
up->acr |= UART_ACR_TXDIS;
|
|
|
serial_icr_write(up, UART_ACR, up->acr);
|
|
|
}
|
|
|
@@ -1307,13 +1286,13 @@ static void serial8250_start_tx(struct uart_port *port)
|
|
|
|
|
|
if (!(up->ier & UART_IER_THRI)) {
|
|
|
up->ier |= UART_IER_THRI;
|
|
|
- serial_out(up, UART_IER, up->ier);
|
|
|
+ serial_port_out(port, UART_IER, up->ier);
|
|
|
|
|
|
if (up->bugs & UART_BUG_TXEN) {
|
|
|
unsigned char lsr;
|
|
|
lsr = serial_in(up, UART_LSR);
|
|
|
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
|
|
|
- if ((up->port.type == PORT_RM9000) ?
|
|
|
+ if ((port->type == PORT_RM9000) ?
|
|
|
(lsr & UART_LSR_THRE) :
|
|
|
(lsr & UART_LSR_TEMT))
|
|
|
serial8250_tx_chars(up);
|
|
|
@@ -1323,7 +1302,7 @@ static void serial8250_start_tx(struct uart_port *port)
|
|
|
/*
|
|
|
* Re-enable the transmitter if we disabled it.
|
|
|
*/
|
|
|
- if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
|
|
|
+ if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
|
|
|
up->acr &= ~UART_ACR_TXDIS;
|
|
|
serial_icr_write(up, UART_ACR, up->acr);
|
|
|
}
|
|
|
@@ -1336,7 +1315,7 @@ static void serial8250_stop_rx(struct uart_port *port)
|
|
|
|
|
|
up->ier &= ~UART_IER_RLSI;
|
|
|
up->port.read_status_mask &= ~UART_LSR_DR;
|
|
|
- serial_out(up, UART_IER, up->ier);
|
|
|
+ serial_port_out(port, UART_IER, up->ier);
|
|
|
}
|
|
|
|
|
|
static void serial8250_enable_ms(struct uart_port *port)
|
|
|
@@ -1349,7 +1328,7 @@ static void serial8250_enable_ms(struct uart_port *port)
|
|
|
return;
|
|
|
|
|
|
up->ier |= UART_IER_MSI;
|
|
|
- serial_out(up, UART_IER, up->ier);
|
|
|
+ serial_port_out(port, UART_IER, up->ier);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
@@ -1381,14 +1360,15 @@ static void clear_rx_fifo(struct uart_8250_port *up)
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unsigned char
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serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
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{
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- struct tty_struct *tty = up->port.state->port.tty;
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+ struct uart_port *port = &up->port;
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+ struct tty_struct *tty = port->state->port.tty;
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unsigned char ch;
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int max_count = 256;
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char flag;
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do {
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if (likely(lsr & UART_LSR_DR))
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- ch = serial_inp(up, UART_RX);
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+ ch = serial_in(up, UART_RX);
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else
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/*
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* Intel 82571 has a Serial Over Lan device that will
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@@ -1400,7 +1380,7 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
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ch = 0;
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flag = TTY_NORMAL;
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- up->port.icount.rx++;
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+ port->icount.rx++;
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lsr |= up->lsr_saved_flags;
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up->lsr_saved_flags = 0;
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@@ -1411,12 +1391,12 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
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*/
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if (lsr & UART_LSR_BI) {
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lsr &= ~(UART_LSR_FE | UART_LSR_PE);
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- up->port.icount.brk++;
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+ port->icount.brk++;
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/*
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* If tegra port then clear the rx fifo to
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* accept another break/character.
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*/
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- if (up->port.type == PORT_TEGRA)
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+ if (port->type == PORT_TEGRA)
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clear_rx_fifo(up);
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/*
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@@ -1425,19 +1405,19 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
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* may get masked by ignore_status_mask
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* or read_status_mask.
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*/
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- if (uart_handle_break(&up->port))
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+ if (uart_handle_break(port))
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goto ignore_char;
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} else if (lsr & UART_LSR_PE)
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- up->port.icount.parity++;
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+ port->icount.parity++;
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else if (lsr & UART_LSR_FE)
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- up->port.icount.frame++;
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+ port->icount.frame++;
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if (lsr & UART_LSR_OE)
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- up->port.icount.overrun++;
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+ port->icount.overrun++;
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/*
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* Mask off conditions which should be ignored.
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*/
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- lsr &= up->port.read_status_mask;
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+ lsr &= port->read_status_mask;
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if (lsr & UART_LSR_BI) {
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DEBUG_INTR("handling break....");
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@@ -1447,34 +1427,35 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
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else if (lsr & UART_LSR_FE)
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flag = TTY_FRAME;
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}
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- if (uart_handle_sysrq_char(&up->port, ch))
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+ if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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- uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
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+ uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
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ignore_char:
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- lsr = serial_inp(up, UART_LSR);
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+ lsr = serial_in(up, UART_LSR);
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} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
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- spin_unlock(&up->port.lock);
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+ spin_unlock(&port->lock);
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tty_flip_buffer_push(tty);
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- spin_lock(&up->port.lock);
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+ spin_lock(&port->lock);
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return lsr;
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}
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EXPORT_SYMBOL_GPL(serial8250_rx_chars);
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void serial8250_tx_chars(struct uart_8250_port *up)
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{
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- struct circ_buf *xmit = &up->port.state->xmit;
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+ struct uart_port *port = &up->port;
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+ struct circ_buf *xmit = &port->state->xmit;
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int count;
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- if (up->port.x_char) {
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- serial_outp(up, UART_TX, up->port.x_char);
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- up->port.icount.tx++;
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- up->port.x_char = 0;
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+ if (port->x_char) {
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+ serial_out(up, UART_TX, port->x_char);
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+ port->icount.tx++;
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+ port->x_char = 0;
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return;
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}
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- if (uart_tx_stopped(&up->port)) {
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- serial8250_stop_tx(&up->port);
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+ if (uart_tx_stopped(port)) {
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+ serial8250_stop_tx(port);
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return;
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}
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if (uart_circ_empty(xmit)) {
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@@ -1486,13 +1467,13 @@ void serial8250_tx_chars(struct uart_8250_port *up)
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do {
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serial_out(up, UART_TX, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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- up->port.icount.tx++;
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+ port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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- uart_write_wakeup(&up->port);
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+ uart_write_wakeup(port);
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DEBUG_INTR("THRE...");
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@@ -1503,22 +1484,23 @@ EXPORT_SYMBOL_GPL(serial8250_tx_chars);
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unsigned int serial8250_modem_status(struct uart_8250_port *up)
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{
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+ struct uart_port *port = &up->port;
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unsigned int status = serial_in(up, UART_MSR);
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status |= up->msr_saved_flags;
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up->msr_saved_flags = 0;
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if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
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- up->port.state != NULL) {
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+ port->state != NULL) {
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if (status & UART_MSR_TERI)
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- up->port.icount.rng++;
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+ port->icount.rng++;
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if (status & UART_MSR_DDSR)
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- up->port.icount.dsr++;
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+ port->icount.dsr++;
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if (status & UART_MSR_DDCD)
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- uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
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+ uart_handle_dcd_change(port, status & UART_MSR_DCD);
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if (status & UART_MSR_DCTS)
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- uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
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+ uart_handle_cts_change(port, status & UART_MSR_CTS);
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- wake_up_interruptible(&up->port.state->port.delta_msr_wait);
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+ wake_up_interruptible(&port->state->port.delta_msr_wait);
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}
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return status;
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@@ -1538,9 +1520,9 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
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if (iir & UART_IIR_NO_INT)
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return 0;
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- spin_lock_irqsave(&up->port.lock, flags);
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+ spin_lock_irqsave(&port->lock, flags);
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- status = serial_inp(up, UART_LSR);
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+ status = serial_port_in(port, UART_LSR);
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DEBUG_INTR("status = %x...", status);
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@@ -1550,16 +1532,14 @@ int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
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if (status & UART_LSR_THRE)
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serial8250_tx_chars(up);
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- spin_unlock_irqrestore(&up->port.lock, flags);
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+ spin_unlock_irqrestore(&port->lock, flags);
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return 1;
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}
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EXPORT_SYMBOL_GPL(serial8250_handle_irq);
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static int serial8250_default_handle_irq(struct uart_port *port)
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{
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- struct uart_8250_port *up =
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- container_of(port, struct uart_8250_port, port);
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- unsigned int iir = serial_in(up, UART_IIR);
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+ unsigned int iir = serial_port_in(port, UART_IIR);
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return serial8250_handle_irq(port, iir);
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}
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@@ -1750,7 +1730,7 @@ static void serial8250_backup_timeout(unsigned long data)
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* Must disable interrupts or else we risk racing with the interrupt
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* based handler.
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*/
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- if (is_real_interrupt(up->port.irq)) {
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+ if (up->port.irq) {
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ier = serial_in(up, UART_IER);
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serial_out(up, UART_IER, 0);
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}
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@@ -1775,7 +1755,7 @@ static void serial8250_backup_timeout(unsigned long data)
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if (!(iir & UART_IIR_NO_INT))
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serial8250_tx_chars(up);
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- if (is_real_interrupt(up->port.irq))
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+ if (up->port.irq)
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serial_out(up, UART_IER, ier);
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spin_unlock_irqrestore(&up->port.lock, flags);
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@@ -1792,10 +1772,10 @@ static unsigned int serial8250_tx_empty(struct uart_port *port)
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unsigned long flags;
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unsigned int lsr;
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- spin_lock_irqsave(&up->port.lock, flags);
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- lsr = serial_in(up, UART_LSR);
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+ spin_lock_irqsave(&port->lock, flags);
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+ lsr = serial_port_in(port, UART_LSR);
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up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
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- spin_unlock_irqrestore(&up->port.lock, flags);
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+ spin_unlock_irqrestore(&port->lock, flags);
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return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
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}
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@@ -1840,7 +1820,7 @@ static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
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mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
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- serial_out(up, UART_MCR, mcr);
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+ serial_port_out(port, UART_MCR, mcr);
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}
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static void serial8250_break_ctl(struct uart_port *port, int break_state)
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@@ -1849,13 +1829,13 @@ static void serial8250_break_ctl(struct uart_port *port, int break_state)
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container_of(port, struct uart_8250_port, port);
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unsigned long flags;
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- spin_lock_irqsave(&up->port.lock, flags);
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+ spin_lock_irqsave(&port->lock, flags);
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if (break_state == -1)
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up->lcr |= UART_LCR_SBC;
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else
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up->lcr &= ~UART_LCR_SBC;
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- serial_out(up, UART_LCR, up->lcr);
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- spin_unlock_irqrestore(&up->port.lock, flags);
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+ serial_port_out(port, UART_LCR, up->lcr);
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+ spin_unlock_irqrestore(&port->lock, flags);
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}
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/*
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@@ -1900,14 +1880,12 @@ static void wait_for_xmitr(struct uart_8250_port *up, int bits)
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static int serial8250_get_poll_char(struct uart_port *port)
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{
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- struct uart_8250_port *up =
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- container_of(port, struct uart_8250_port, port);
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- unsigned char lsr = serial_inp(up, UART_LSR);
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+ unsigned char lsr = serial_port_in(port, UART_LSR);
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if (!(lsr & UART_LSR_DR))
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return NO_POLL_CHAR;
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- return serial_inp(up, UART_RX);
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+ return serial_port_in(port, UART_RX);
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}
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@@ -1921,21 +1899,21 @@ static void serial8250_put_poll_char(struct uart_port *port,
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/*
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* First save the IER then disable the interrupts
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*/
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- ier = serial_in(up, UART_IER);
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+ ier = serial_port_in(port, UART_IER);
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if (up->capabilities & UART_CAP_UUE)
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- serial_out(up, UART_IER, UART_IER_UUE);
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+ serial_port_out(port, UART_IER, UART_IER_UUE);
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else
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- serial_out(up, UART_IER, 0);
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+ serial_port_out(port, UART_IER, 0);
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wait_for_xmitr(up, BOTH_EMPTY);
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/*
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* Send the character out.
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* If a LF, also do CR...
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*/
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- serial_out(up, UART_TX, c);
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+ serial_port_out(port, UART_TX, c);
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if (c == 10) {
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wait_for_xmitr(up, BOTH_EMPTY);
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- serial_out(up, UART_TX, 13);
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+ serial_port_out(port, UART_TX, 13);
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}
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/*
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@@ -1943,7 +1921,7 @@ static void serial8250_put_poll_char(struct uart_port *port,
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* and restore the IER
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*/
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wait_for_xmitr(up, BOTH_EMPTY);
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- serial_out(up, UART_IER, ier);
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+ serial_port_out(port, UART_IER, ier);
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}
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#endif /* CONFIG_CONSOLE_POLL */
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@@ -1956,25 +1934,25 @@ static int serial8250_startup(struct uart_port *port)
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unsigned char lsr, iir;
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int retval;
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- up->port.fifosize = uart_config[up->port.type].fifo_size;
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+ port->fifosize = uart_config[up->port.type].fifo_size;
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up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
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up->capabilities = uart_config[up->port.type].flags;
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up->mcr = 0;
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- if (up->port.iotype != up->cur_iotype)
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+ if (port->iotype != up->cur_iotype)
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set_io_from_upio(port);
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- if (up->port.type == PORT_16C950) {
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+ if (port->type == PORT_16C950) {
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/* Wake up and initialize UART */
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up->acr = 0;
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- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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- serial_outp(up, UART_EFR, UART_EFR_ECB);
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- serial_outp(up, UART_IER, 0);
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- serial_outp(up, UART_LCR, 0);
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+ serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
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+ serial_port_out(port, UART_EFR, UART_EFR_ECB);
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+ serial_port_out(port, UART_IER, 0);
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+ serial_port_out(port, UART_LCR, 0);
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serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
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- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
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- serial_outp(up, UART_EFR, UART_EFR_ECB);
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- serial_outp(up, UART_LCR, 0);
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+ serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
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+ serial_port_out(port, UART_EFR, UART_EFR_ECB);
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+ serial_port_out(port, UART_LCR, 0);
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}
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#ifdef CONFIG_SERIAL_8250_RSA
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@@ -1994,41 +1972,43 @@ static int serial8250_startup(struct uart_port *port)
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/*
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* Clear the interrupt registers.
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*/
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- (void) serial_inp(up, UART_LSR);
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- (void) serial_inp(up, UART_RX);
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- (void) serial_inp(up, UART_IIR);
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- (void) serial_inp(up, UART_MSR);
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+ serial_port_in(port, UART_LSR);
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+ serial_port_in(port, UART_RX);
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+ serial_port_in(port, UART_IIR);
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+ serial_port_in(port, UART_MSR);
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/*
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* At this point, there's no way the LSR could still be 0xff;
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* if it is, then bail out, because there's likely no UART
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* here.
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*/
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- if (!(up->port.flags & UPF_BUGGY_UART) &&
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- (serial_inp(up, UART_LSR) == 0xff)) {
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+ if (!(port->flags & UPF_BUGGY_UART) &&
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+ (serial_port_in(port, UART_LSR) == 0xff)) {
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printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
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- serial_index(&up->port));
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+ serial_index(port));
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return -ENODEV;
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}
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/*
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|
|
* For a XR16C850, we need to set the trigger levels
|
|
|
*/
|
|
|
- if (up->port.type == PORT_16850) {
|
|
|
+ if (port->type == PORT_16850) {
|
|
|
unsigned char fctr;
|
|
|
|
|
|
- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
|
|
+ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
|
|
|
|
|
- fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
|
|
|
- serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
|
|
|
- serial_outp(up, UART_TRG, UART_TRG_96);
|
|
|
- serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
|
|
|
- serial_outp(up, UART_TRG, UART_TRG_96);
|
|
|
+ fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
|
|
|
+ serial_port_out(port, UART_FCTR,
|
|
|
+ fctr | UART_FCTR_TRGD | UART_FCTR_RX);
|
|
|
+ serial_port_out(port, UART_TRG, UART_TRG_96);
|
|
|
+ serial_port_out(port, UART_FCTR,
|
|
|
+ fctr | UART_FCTR_TRGD | UART_FCTR_TX);
|
|
|
+ serial_port_out(port, UART_TRG, UART_TRG_96);
|
|
|
|
|
|
- serial_outp(up, UART_LCR, 0);
|
|
|
+ serial_port_out(port, UART_LCR, 0);
|
|
|
}
|
|
|
|
|
|
- if (is_real_interrupt(up->port.irq)) {
|
|
|
+ if (port->irq) {
|
|
|
unsigned char iir1;
|
|
|
/*
|
|
|
* Test for UARTs that do not reassert THRE when the
|
|
|
@@ -2038,23 +2018,23 @@ static int serial8250_startup(struct uart_port *port)
|
|
|
* the interrupt is enabled. Delays are necessary to
|
|
|
* allow register changes to become visible.
|
|
|
*/
|
|
|
- spin_lock_irqsave(&up->port.lock, flags);
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
if (up->port.irqflags & IRQF_SHARED)
|
|
|
- disable_irq_nosync(up->port.irq);
|
|
|
+ disable_irq_nosync(port->irq);
|
|
|
|
|
|
wait_for_xmitr(up, UART_LSR_THRE);
|
|
|
- serial_out_sync(up, UART_IER, UART_IER_THRI);
|
|
|
+ serial_port_out_sync(port, UART_IER, UART_IER_THRI);
|
|
|
udelay(1); /* allow THRE to set */
|
|
|
- iir1 = serial_in(up, UART_IIR);
|
|
|
- serial_out(up, UART_IER, 0);
|
|
|
- serial_out_sync(up, UART_IER, UART_IER_THRI);
|
|
|
+ iir1 = serial_port_in(port, UART_IIR);
|
|
|
+ serial_port_out(port, UART_IER, 0);
|
|
|
+ serial_port_out_sync(port, UART_IER, UART_IER_THRI);
|
|
|
udelay(1); /* allow a working UART time to re-assert THRE */
|
|
|
- iir = serial_in(up, UART_IIR);
|
|
|
- serial_out(up, UART_IER, 0);
|
|
|
+ iir = serial_port_in(port, UART_IIR);
|
|
|
+ serial_port_out(port, UART_IER, 0);
|
|
|
|
|
|
- if (up->port.irqflags & IRQF_SHARED)
|
|
|
- enable_irq(up->port.irq);
|
|
|
- spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
+ if (port->irqflags & IRQF_SHARED)
|
|
|
+ enable_irq(port->irq);
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
|
|
/*
|
|
|
* If the interrupt is not reasserted, setup a timer to
|
|
|
@@ -2083,7 +2063,7 @@ static int serial8250_startup(struct uart_port *port)
|
|
|
* hardware interrupt, we use a timer-based system. The original
|
|
|
* driver used to do this with IRQ0.
|
|
|
*/
|
|
|
- if (!is_real_interrupt(up->port.irq)) {
|
|
|
+ if (!port->irq) {
|
|
|
up->timer.data = (unsigned long)up;
|
|
|
mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
|
|
|
} else {
|
|
|
@@ -2095,20 +2075,20 @@ static int serial8250_startup(struct uart_port *port)
|
|
|
/*
|
|
|
* Now, initialize the UART
|
|
|
*/
|
|
|
- serial_outp(up, UART_LCR, UART_LCR_WLEN8);
|
|
|
+ serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
|
|
|
|
|
|
- spin_lock_irqsave(&up->port.lock, flags);
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
if (up->port.flags & UPF_FOURPORT) {
|
|
|
- if (!is_real_interrupt(up->port.irq))
|
|
|
+ if (!up->port.irq)
|
|
|
up->port.mctrl |= TIOCM_OUT1;
|
|
|
} else
|
|
|
/*
|
|
|
* Most PC uarts need OUT2 raised to enable interrupts.
|
|
|
*/
|
|
|
- if (is_real_interrupt(up->port.irq))
|
|
|
+ if (port->irq)
|
|
|
up->port.mctrl |= TIOCM_OUT2;
|
|
|
|
|
|
- serial8250_set_mctrl(&up->port, up->port.mctrl);
|
|
|
+ serial8250_set_mctrl(port, port->mctrl);
|
|
|
|
|
|
/* Serial over Lan (SoL) hack:
|
|
|
Intel 8257x Gigabit ethernet chips have a
|
|
|
@@ -2128,10 +2108,10 @@ static int serial8250_startup(struct uart_port *port)
|
|
|
* Do a quick test to see if we receive an
|
|
|
* interrupt when we enable the TX irq.
|
|
|
*/
|
|
|
- serial_outp(up, UART_IER, UART_IER_THRI);
|
|
|
- lsr = serial_in(up, UART_LSR);
|
|
|
- iir = serial_in(up, UART_IIR);
|
|
|
- serial_outp(up, UART_IER, 0);
|
|
|
+ serial_port_out(port, UART_IER, UART_IER_THRI);
|
|
|
+ lsr = serial_port_in(port, UART_LSR);
|
|
|
+ iir = serial_port_in(port, UART_IIR);
|
|
|
+ serial_port_out(port, UART_IER, 0);
|
|
|
|
|
|
if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
|
|
|
if (!(up->bugs & UART_BUG_TXEN)) {
|
|
|
@@ -2144,17 +2124,17 @@ static int serial8250_startup(struct uart_port *port)
|
|
|
}
|
|
|
|
|
|
dont_test_tx_en:
|
|
|
- spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
|
|
/*
|
|
|
* Clear the interrupt registers again for luck, and clear the
|
|
|
* saved flags to avoid getting false values from polling
|
|
|
* routines or the previous session.
|
|
|
*/
|
|
|
- serial_inp(up, UART_LSR);
|
|
|
- serial_inp(up, UART_RX);
|
|
|
- serial_inp(up, UART_IIR);
|
|
|
- serial_inp(up, UART_MSR);
|
|
|
+ serial_port_in(port, UART_LSR);
|
|
|
+ serial_port_in(port, UART_RX);
|
|
|
+ serial_port_in(port, UART_IIR);
|
|
|
+ serial_port_in(port, UART_MSR);
|
|
|
up->lsr_saved_flags = 0;
|
|
|
up->msr_saved_flags = 0;
|
|
|
|
|
|
@@ -2164,16 +2144,16 @@ static int serial8250_startup(struct uart_port *port)
|
|
|
* anyway, so we don't enable them here.
|
|
|
*/
|
|
|
up->ier = UART_IER_RLSI | UART_IER_RDI;
|
|
|
- serial_outp(up, UART_IER, up->ier);
|
|
|
+ serial_port_out(port, UART_IER, up->ier);
|
|
|
|
|
|
- if (up->port.flags & UPF_FOURPORT) {
|
|
|
+ if (port->flags & UPF_FOURPORT) {
|
|
|
unsigned int icp;
|
|
|
/*
|
|
|
* Enable interrupts on the AST Fourport board
|
|
|
*/
|
|
|
- icp = (up->port.iobase & 0xfe0) | 0x01f;
|
|
|
+ icp = (port->iobase & 0xfe0) | 0x01f;
|
|
|
outb_p(0x80, icp);
|
|
|
- (void) inb_p(icp);
|
|
|
+ inb_p(icp);
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
|
@@ -2189,23 +2169,24 @@ static void serial8250_shutdown(struct uart_port *port)
|
|
|
* Disable interrupts from this port
|
|
|
*/
|
|
|
up->ier = 0;
|
|
|
- serial_outp(up, UART_IER, 0);
|
|
|
+ serial_port_out(port, UART_IER, 0);
|
|
|
|
|
|
- spin_lock_irqsave(&up->port.lock, flags);
|
|
|
- if (up->port.flags & UPF_FOURPORT) {
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
+ if (port->flags & UPF_FOURPORT) {
|
|
|
/* reset interrupts on the AST Fourport board */
|
|
|
- inb((up->port.iobase & 0xfe0) | 0x1f);
|
|
|
- up->port.mctrl |= TIOCM_OUT1;
|
|
|
+ inb((port->iobase & 0xfe0) | 0x1f);
|
|
|
+ port->mctrl |= TIOCM_OUT1;
|
|
|
} else
|
|
|
- up->port.mctrl &= ~TIOCM_OUT2;
|
|
|
+ port->mctrl &= ~TIOCM_OUT2;
|
|
|
|
|
|
- serial8250_set_mctrl(&up->port, up->port.mctrl);
|
|
|
- spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
+ serial8250_set_mctrl(port, port->mctrl);
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
|
|
|
/*
|
|
|
* Disable break condition and FIFOs
|
|
|
*/
|
|
|
- serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
|
|
|
+ serial_port_out(port, UART_LCR,
|
|
|
+ serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
|
|
|
serial8250_clear_fifos(up);
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_8250_RSA
|
|
|
@@ -2219,11 +2200,11 @@ static void serial8250_shutdown(struct uart_port *port)
|
|
|
* Read data port to reset things, and then unlink from
|
|
|
* the IRQ chain.
|
|
|
*/
|
|
|
- (void) serial_in(up, UART_RX);
|
|
|
+ serial_port_in(port, UART_RX);
|
|
|
|
|
|
del_timer_sync(&up->timer);
|
|
|
up->timer.function = serial8250_timeout;
|
|
|
- if (is_real_interrupt(up->port.irq))
|
|
|
+ if (port->irq)
|
|
|
serial_unlink_irq_chain(up);
|
|
|
}
|
|
|
|
|
|
@@ -2298,11 +2279,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
|
|
|
quot++;
|
|
|
|
|
|
- if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
|
|
|
+ if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
|
|
|
if (baud < 2400)
|
|
|
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
|
|
|
else
|
|
|
- fcr = uart_config[up->port.type].fcr;
|
|
|
+ fcr = uart_config[port->type].fcr;
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
@@ -2313,7 +2294,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
* have sufficient FIFO entries for the latency of the remote
|
|
|
* UART to respond. IOW, at least 32 bytes of FIFO.
|
|
|
*/
|
|
|
- if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
|
|
|
+ if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
|
|
|
up->mcr &= ~UART_MCR_AFE;
|
|
|
if (termios->c_cflag & CRTSCTS)
|
|
|
up->mcr |= UART_MCR_AFE;
|
|
|
@@ -2323,40 +2304,40 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
* Ok, we're now changing the port state. Do it with
|
|
|
* interrupts disabled.
|
|
|
*/
|
|
|
- spin_lock_irqsave(&up->port.lock, flags);
|
|
|
+ spin_lock_irqsave(&port->lock, flags);
|
|
|
|
|
|
/*
|
|
|
* Update the per-port timeout.
|
|
|
*/
|
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
|
|
- up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
|
|
|
+ port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
|
|
|
if (termios->c_iflag & INPCK)
|
|
|
- up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
|
|
|
+ port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
|
|
|
if (termios->c_iflag & (BRKINT | PARMRK))
|
|
|
- up->port.read_status_mask |= UART_LSR_BI;
|
|
|
+ port->read_status_mask |= UART_LSR_BI;
|
|
|
|
|
|
/*
|
|
|
* Characteres to ignore
|
|
|
*/
|
|
|
- up->port.ignore_status_mask = 0;
|
|
|
+ port->ignore_status_mask = 0;
|
|
|
if (termios->c_iflag & IGNPAR)
|
|
|
- up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
|
|
|
+ port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
|
|
|
if (termios->c_iflag & IGNBRK) {
|
|
|
- up->port.ignore_status_mask |= UART_LSR_BI;
|
|
|
+ port->ignore_status_mask |= UART_LSR_BI;
|
|
|
/*
|
|
|
* If we're ignoring parity and break indicators,
|
|
|
* ignore overruns too (for real raw support).
|
|
|
*/
|
|
|
if (termios->c_iflag & IGNPAR)
|
|
|
- up->port.ignore_status_mask |= UART_LSR_OE;
|
|
|
+ port->ignore_status_mask |= UART_LSR_OE;
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* ignore all characters if CREAD is not set
|
|
|
*/
|
|
|
if ((termios->c_cflag & CREAD) == 0)
|
|
|
- up->port.ignore_status_mask |= UART_LSR_DR;
|
|
|
+ port->ignore_status_mask |= UART_LSR_DR;
|
|
|
|
|
|
/*
|
|
|
* CTS flow control flag and modem status interrupts
|
|
|
@@ -2370,7 +2351,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
if (up->capabilities & UART_CAP_RTOIE)
|
|
|
up->ier |= UART_IER_RTOIE;
|
|
|
|
|
|
- serial_out(up, UART_IER, up->ier);
|
|
|
+ serial_port_out(port, UART_IER, up->ier);
|
|
|
|
|
|
if (up->capabilities & UART_CAP_EFR) {
|
|
|
unsigned char efr = 0;
|
|
|
@@ -2382,11 +2363,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
if (termios->c_cflag & CRTSCTS)
|
|
|
efr |= UART_EFR_CTS;
|
|
|
|
|
|
- serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
|
|
|
- if (up->port.flags & UPF_EXAR_EFR)
|
|
|
- serial_outp(up, UART_XR_EFR, efr);
|
|
|
+ serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
|
|
|
+ if (port->flags & UPF_EXAR_EFR)
|
|
|
+ serial_port_out(port, UART_XR_EFR, efr);
|
|
|
else
|
|
|
- serial_outp(up, UART_EFR, efr);
|
|
|
+ serial_port_out(port, UART_EFR, efr);
|
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_ARCH_OMAP
|
|
|
@@ -2394,18 +2375,20 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
if (cpu_is_omap1510() && is_omap_port(up)) {
|
|
|
if (baud == 115200) {
|
|
|
quot = 1;
|
|
|
- serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
|
|
|
+ serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
|
|
|
} else
|
|
|
- serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
|
|
|
+ serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
- if (up->capabilities & UART_NATSEMI) {
|
|
|
- /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
|
|
|
- serial_outp(up, UART_LCR, 0xe0);
|
|
|
- } else {
|
|
|
- serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
|
|
|
- }
|
|
|
+ /*
|
|
|
+ * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
|
|
|
+ * otherwise just set DLAB
|
|
|
+ */
|
|
|
+ if (up->capabilities & UART_NATSEMI)
|
|
|
+ serial_port_out(port, UART_LCR, 0xe0);
|
|
|
+ else
|
|
|
+ serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
|
|
|
|
|
|
serial_dl_write(up, quot);
|
|
|
|
|
|
@@ -2413,20 +2396,19 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
|
* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
|
|
|
* is written without DLAB set, this mode will be disabled.
|
|
|
*/
|
|
|
- if (up->port.type == PORT_16750)
|
|
|
- serial_outp(up, UART_FCR, fcr);
|
|
|
+ if (port->type == PORT_16750)
|
|
|
+ serial_port_out(port, UART_FCR, fcr);
|
|
|
|
|
|
- serial_outp(up, UART_LCR, cval); /* reset DLAB */
|
|
|
+ serial_port_out(port, UART_LCR, cval); /* reset DLAB */
|
|
|
up->lcr = cval; /* Save LCR */
|
|
|
- if (up->port.type != PORT_16750) {
|
|
|
- if (fcr & UART_FCR_ENABLE_FIFO) {
|
|
|
- /* emulated UARTs (Lucent Venus 167x) need two steps */
|
|
|
- serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
- }
|
|
|
- serial_outp(up, UART_FCR, fcr); /* set fcr */
|
|
|
- }
|
|
|
- serial8250_set_mctrl(&up->port, up->port.mctrl);
|
|
|
- spin_unlock_irqrestore(&up->port.lock, flags);
|
|
|
+ if (port->type != PORT_16750) {
|
|
|
+ /* emulated UARTs (Lucent Venus 167x) need two steps */
|
|
|
+ if (fcr & UART_FCR_ENABLE_FIFO)
|
|
|
+ serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
|
|
|
+ serial_port_out(port, UART_FCR, fcr); /* set fcr */
|
|
|
+ }
|
|
|
+ serial8250_set_mctrl(port, port->mctrl);
|
|
|
+ spin_unlock_irqrestore(&port->lock, flags);
|
|
|
/* Don't rewrite B0 */
|
|
|
if (tty_termios_baud_rate(termios))
|
|
|
tty_termios_encode_baud_rate(termios, baud, baud);
|
|
|
@@ -2491,26 +2473,26 @@ static unsigned int serial8250_port_size(struct uart_8250_port *pt)
|
|
|
static int serial8250_request_std_resource(struct uart_8250_port *up)
|
|
|
{
|
|
|
unsigned int size = serial8250_port_size(up);
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
int ret = 0;
|
|
|
|
|
|
- switch (up->port.iotype) {
|
|
|
+ switch (port->iotype) {
|
|
|
case UPIO_AU:
|
|
|
case UPIO_TSI:
|
|
|
case UPIO_MEM32:
|
|
|
case UPIO_MEM:
|
|
|
- if (!up->port.mapbase)
|
|
|
+ if (!port->mapbase)
|
|
|
break;
|
|
|
|
|
|
- if (!request_mem_region(up->port.mapbase, size, "serial")) {
|
|
|
+ if (!request_mem_region(port->mapbase, size, "serial")) {
|
|
|
ret = -EBUSY;
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
- if (up->port.flags & UPF_IOREMAP) {
|
|
|
- up->port.membase = ioremap_nocache(up->port.mapbase,
|
|
|
- size);
|
|
|
- if (!up->port.membase) {
|
|
|
- release_mem_region(up->port.mapbase, size);
|
|
|
+ if (port->flags & UPF_IOREMAP) {
|
|
|
+ port->membase = ioremap_nocache(port->mapbase, size);
|
|
|
+ if (!port->membase) {
|
|
|
+ release_mem_region(port->mapbase, size);
|
|
|
ret = -ENOMEM;
|
|
|
}
|
|
|
}
|
|
|
@@ -2518,7 +2500,7 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
|
|
|
|
|
|
case UPIO_HUB6:
|
|
|
case UPIO_PORT:
|
|
|
- if (!request_region(up->port.iobase, size, "serial"))
|
|
|
+ if (!request_region(port->iobase, size, "serial"))
|
|
|
ret = -EBUSY;
|
|
|
break;
|
|
|
}
|
|
|
@@ -2528,26 +2510,27 @@ static int serial8250_request_std_resource(struct uart_8250_port *up)
|
|
|
static void serial8250_release_std_resource(struct uart_8250_port *up)
|
|
|
{
|
|
|
unsigned int size = serial8250_port_size(up);
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
|
|
|
- switch (up->port.iotype) {
|
|
|
+ switch (port->iotype) {
|
|
|
case UPIO_AU:
|
|
|
case UPIO_TSI:
|
|
|
case UPIO_MEM32:
|
|
|
case UPIO_MEM:
|
|
|
- if (!up->port.mapbase)
|
|
|
+ if (!port->mapbase)
|
|
|
break;
|
|
|
|
|
|
- if (up->port.flags & UPF_IOREMAP) {
|
|
|
- iounmap(up->port.membase);
|
|
|
- up->port.membase = NULL;
|
|
|
+ if (port->flags & UPF_IOREMAP) {
|
|
|
+ iounmap(port->membase);
|
|
|
+ port->membase = NULL;
|
|
|
}
|
|
|
|
|
|
- release_mem_region(up->port.mapbase, size);
|
|
|
+ release_mem_region(port->mapbase, size);
|
|
|
break;
|
|
|
|
|
|
case UPIO_HUB6:
|
|
|
case UPIO_PORT:
|
|
|
- release_region(up->port.iobase, size);
|
|
|
+ release_region(port->iobase, size);
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
@@ -2556,12 +2539,13 @@ static int serial8250_request_rsa_resource(struct uart_8250_port *up)
|
|
|
{
|
|
|
unsigned long start = UART_RSA_BASE << up->port.regshift;
|
|
|
unsigned int size = 8 << up->port.regshift;
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
int ret = -EINVAL;
|
|
|
|
|
|
- switch (up->port.iotype) {
|
|
|
+ switch (port->iotype) {
|
|
|
case UPIO_HUB6:
|
|
|
case UPIO_PORT:
|
|
|
- start += up->port.iobase;
|
|
|
+ start += port->iobase;
|
|
|
if (request_region(start, size, "serial-rsa"))
|
|
|
ret = 0;
|
|
|
else
|
|
|
@@ -2576,11 +2560,12 @@ static void serial8250_release_rsa_resource(struct uart_8250_port *up)
|
|
|
{
|
|
|
unsigned long offset = UART_RSA_BASE << up->port.regshift;
|
|
|
unsigned int size = 8 << up->port.regshift;
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
|
|
|
- switch (up->port.iotype) {
|
|
|
+ switch (port->iotype) {
|
|
|
case UPIO_HUB6:
|
|
|
case UPIO_PORT:
|
|
|
- release_region(up->port.iobase + offset, size);
|
|
|
+ release_region(port->iobase + offset, size);
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
@@ -2591,7 +2576,7 @@ static void serial8250_release_port(struct uart_port *port)
|
|
|
container_of(port, struct uart_8250_port, port);
|
|
|
|
|
|
serial8250_release_std_resource(up);
|
|
|
- if (up->port.type == PORT_RSA)
|
|
|
+ if (port->type == PORT_RSA)
|
|
|
serial8250_release_rsa_resource(up);
|
|
|
}
|
|
|
|
|
|
@@ -2602,7 +2587,7 @@ static int serial8250_request_port(struct uart_port *port)
|
|
|
int ret = 0;
|
|
|
|
|
|
ret = serial8250_request_std_resource(up);
|
|
|
- if (ret == 0 && up->port.type == PORT_RSA) {
|
|
|
+ if (ret == 0 && port->type == PORT_RSA) {
|
|
|
ret = serial8250_request_rsa_resource(up);
|
|
|
if (ret < 0)
|
|
|
serial8250_release_std_resource(up);
|
|
|
@@ -2630,22 +2615,22 @@ static void serial8250_config_port(struct uart_port *port, int flags)
|
|
|
if (ret < 0)
|
|
|
probeflags &= ~PROBE_RSA;
|
|
|
|
|
|
- if (up->port.iotype != up->cur_iotype)
|
|
|
+ if (port->iotype != up->cur_iotype)
|
|
|
set_io_from_upio(port);
|
|
|
|
|
|
if (flags & UART_CONFIG_TYPE)
|
|
|
autoconfig(up, probeflags);
|
|
|
|
|
|
/* if access method is AU, it is a 16550 with a quirk */
|
|
|
- if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
|
|
|
+ if (port->type == PORT_16550A && port->iotype == UPIO_AU)
|
|
|
up->bugs |= UART_BUG_NOMSR;
|
|
|
|
|
|
- if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
|
|
|
+ if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
|
|
|
autoconfig_irq(up);
|
|
|
|
|
|
- if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
|
|
|
+ if (port->type != PORT_RSA && probeflags & PROBE_RSA)
|
|
|
serial8250_release_rsa_resource(up);
|
|
|
- if (up->port.type == PORT_UNKNOWN)
|
|
|
+ if (port->type == PORT_UNKNOWN)
|
|
|
serial8250_release_std_resource(up);
|
|
|
}
|
|
|
|
|
|
@@ -2719,9 +2704,10 @@ static void __init serial8250_isa_init_ports(void)
|
|
|
|
|
|
for (i = 0; i < nr_uarts; i++) {
|
|
|
struct uart_8250_port *up = &serial8250_ports[i];
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
|
|
|
- up->port.line = i;
|
|
|
- spin_lock_init(&up->port.lock);
|
|
|
+ port->line = i;
|
|
|
+ spin_lock_init(&port->lock);
|
|
|
|
|
|
init_timer(&up->timer);
|
|
|
up->timer.function = serial8250_timeout;
|
|
|
@@ -2732,7 +2718,7 @@ static void __init serial8250_isa_init_ports(void)
|
|
|
up->mcr_mask = ~ALPHA_KLUDGE_MCR;
|
|
|
up->mcr_force = ALPHA_KLUDGE_MCR;
|
|
|
|
|
|
- up->port.ops = &serial8250_pops;
|
|
|
+ port->ops = &serial8250_pops;
|
|
|
}
|
|
|
|
|
|
if (share_irqs)
|
|
|
@@ -2741,17 +2727,19 @@ static void __init serial8250_isa_init_ports(void)
|
|
|
for (i = 0, up = serial8250_ports;
|
|
|
i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
|
|
|
i++, up++) {
|
|
|
- up->port.iobase = old_serial_port[i].port;
|
|
|
- up->port.irq = irq_canonicalize(old_serial_port[i].irq);
|
|
|
- up->port.irqflags = old_serial_port[i].irqflags;
|
|
|
- up->port.uartclk = old_serial_port[i].baud_base * 16;
|
|
|
- up->port.flags = old_serial_port[i].flags;
|
|
|
- up->port.hub6 = old_serial_port[i].hub6;
|
|
|
- up->port.membase = old_serial_port[i].iomem_base;
|
|
|
- up->port.iotype = old_serial_port[i].io_type;
|
|
|
- up->port.regshift = old_serial_port[i].iomem_reg_shift;
|
|
|
- set_io_from_upio(&up->port);
|
|
|
- up->port.irqflags |= irqflag;
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
+
|
|
|
+ port->iobase = old_serial_port[i].port;
|
|
|
+ port->irq = irq_canonicalize(old_serial_port[i].irq);
|
|
|
+ port->irqflags = old_serial_port[i].irqflags;
|
|
|
+ port->uartclk = old_serial_port[i].baud_base * 16;
|
|
|
+ port->flags = old_serial_port[i].flags;
|
|
|
+ port->hub6 = old_serial_port[i].hub6;
|
|
|
+ port->membase = old_serial_port[i].iomem_base;
|
|
|
+ port->iotype = old_serial_port[i].io_type;
|
|
|
+ port->regshift = old_serial_port[i].iomem_reg_shift;
|
|
|
+ set_io_from_upio(port);
|
|
|
+ port->irqflags |= irqflag;
|
|
|
if (serial8250_isa_config != NULL)
|
|
|
serial8250_isa_config(i, &up->port, &up->capabilities);
|
|
|
|
|
|
@@ -2799,7 +2787,7 @@ static void serial8250_console_putchar(struct uart_port *port, int ch)
|
|
|
container_of(port, struct uart_8250_port, port);
|
|
|
|
|
|
wait_for_xmitr(up, UART_LSR_THRE);
|
|
|
- serial_out(up, UART_TX, ch);
|
|
|
+ serial_port_out(port, UART_TX, ch);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
@@ -2812,6 +2800,7 @@ static void
|
|
|
serial8250_console_write(struct console *co, const char *s, unsigned int count)
|
|
|
{
|
|
|
struct uart_8250_port *up = &serial8250_ports[co->index];
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
unsigned long flags;
|
|
|
unsigned int ier;
|
|
|
int locked = 1;
|
|
|
@@ -2819,32 +2808,32 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
|
|
|
touch_nmi_watchdog();
|
|
|
|
|
|
local_irq_save(flags);
|
|
|
- if (up->port.sysrq) {
|
|
|
+ if (port->sysrq) {
|
|
|
/* serial8250_handle_irq() already took the lock */
|
|
|
locked = 0;
|
|
|
} else if (oops_in_progress) {
|
|
|
- locked = spin_trylock(&up->port.lock);
|
|
|
+ locked = spin_trylock(&port->lock);
|
|
|
} else
|
|
|
- spin_lock(&up->port.lock);
|
|
|
+ spin_lock(&port->lock);
|
|
|
|
|
|
/*
|
|
|
* First save the IER then disable the interrupts
|
|
|
*/
|
|
|
- ier = serial_in(up, UART_IER);
|
|
|
+ ier = serial_port_in(port, UART_IER);
|
|
|
|
|
|
if (up->capabilities & UART_CAP_UUE)
|
|
|
- serial_out(up, UART_IER, UART_IER_UUE);
|
|
|
+ serial_port_out(port, UART_IER, UART_IER_UUE);
|
|
|
else
|
|
|
- serial_out(up, UART_IER, 0);
|
|
|
+ serial_port_out(port, UART_IER, 0);
|
|
|
|
|
|
- uart_console_write(&up->port, s, count, serial8250_console_putchar);
|
|
|
+ uart_console_write(port, s, count, serial8250_console_putchar);
|
|
|
|
|
|
/*
|
|
|
* Finally, wait for transmitter to become empty
|
|
|
* and restore the IER
|
|
|
*/
|
|
|
wait_for_xmitr(up, BOTH_EMPTY);
|
|
|
- serial_out(up, UART_IER, ier);
|
|
|
+ serial_port_out(port, UART_IER, ier);
|
|
|
|
|
|
/*
|
|
|
* The receive handling will happen properly because the
|
|
|
@@ -2857,7 +2846,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
|
|
|
serial8250_modem_status(up);
|
|
|
|
|
|
if (locked)
|
|
|
- spin_unlock(&up->port.lock);
|
|
|
+ spin_unlock(&port->lock);
|
|
|
local_irq_restore(flags);
|
|
|
}
|
|
|
|
|
|
@@ -3002,17 +2991,18 @@ void serial8250_suspend_port(int line)
|
|
|
void serial8250_resume_port(int line)
|
|
|
{
|
|
|
struct uart_8250_port *up = &serial8250_ports[line];
|
|
|
+ struct uart_port *port = &up->port;
|
|
|
|
|
|
if (up->capabilities & UART_NATSEMI) {
|
|
|
/* Ensure it's still in high speed mode */
|
|
|
- serial_outp(up, UART_LCR, 0xE0);
|
|
|
+ serial_port_out(port, UART_LCR, 0xE0);
|
|
|
|
|
|
ns16550a_goto_highspeed(up);
|
|
|
|
|
|
- serial_outp(up, UART_LCR, 0);
|
|
|
- up->port.uartclk = 921600*16;
|
|
|
+ serial_port_out(port, UART_LCR, 0);
|
|
|
+ port->uartclk = 921600*16;
|
|
|
}
|
|
|
- uart_resume_port(&serial8250_reg, &up->port);
|
|
|
+ uart_resume_port(&serial8250_reg, port);
|
|
|
}
|
|
|
|
|
|
/*
|