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@@ -92,7 +92,7 @@ static int __init st_clksrc_setup_clk(struct device_node *np)
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return 0;
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}
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-static void __init st_clksrc_of_register(struct device_node *np)
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+static int __init st_clksrc_of_register(struct device_node *np)
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{
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int ret;
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uint32_t mode;
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@@ -100,32 +100,36 @@ static void __init st_clksrc_of_register(struct device_node *np)
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ret = of_property_read_u32(np, "st,lpc-mode", &mode);
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if (ret) {
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pr_err("clksrc-st-lpc: An LPC mode must be provided\n");
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- return;
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+ return ret;
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}
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/* LPC can either run as a Clocksource or in RTC or WDT mode */
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if (mode != ST_LPC_MODE_CLKSRC)
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- return;
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+ return 0;
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ddata.base = of_iomap(np, 0);
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if (!ddata.base) {
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pr_err("clksrc-st-lpc: Unable to map iomem\n");
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- return;
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+ return -ENXIO;
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}
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- if (st_clksrc_setup_clk(np)) {
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+ ret = st_clksrc_setup_clk(np);
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+ if (ret) {
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iounmap(ddata.base);
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- return;
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+ return ret;
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}
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- if (st_clksrc_init()) {
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+ ret = st_clksrc_init();
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+ if (ret) {
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clk_disable_unprepare(ddata.clk);
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clk_put(ddata.clk);
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iounmap(ddata.base);
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- return;
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+ return ret;
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}
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pr_info("clksrc-st-lpc: clocksource initialised - running @ %luHz\n",
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clk_get_rate(ddata.clk));
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+
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+ return ret;
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}
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-CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);
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+CLOCKSOURCE_OF_DECLARE_RET(ddata, "st,stih407-lpc", st_clksrc_of_register);
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