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@@ -19,6 +19,7 @@
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#ifndef __ARM_KVM_ARM_H__
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#ifndef __ARM_KVM_ARM_H__
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#define __ARM_KVM_ARM_H__
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#define __ARM_KVM_ARM_H__
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+#include <linux/const.h>
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#include <linux/types.h>
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#include <linux/types.h>
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/* Hyp Configuration Register (HCR) bits */
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/* Hyp Configuration Register (HCR) bits */
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@@ -132,9 +133,9 @@
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* space.
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* space.
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*/
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*/
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#define KVM_PHYS_SHIFT (40)
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#define KVM_PHYS_SHIFT (40)
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-#define KVM_PHYS_SIZE (1ULL << KVM_PHYS_SHIFT)
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-#define KVM_PHYS_MASK (KVM_PHYS_SIZE - 1ULL)
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-#define PTRS_PER_S2_PGD (1ULL << (KVM_PHYS_SHIFT - 30))
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+#define KVM_PHYS_SIZE (_AC(1, ULL) << KVM_PHYS_SHIFT)
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+#define KVM_PHYS_MASK (KVM_PHYS_SIZE - _AC(1, ULL))
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+#define PTRS_PER_S2_PGD (_AC(1, ULL) << (KVM_PHYS_SHIFT - 30))
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/* Virtualization Translation Control Register (VTCR) bits */
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/* Virtualization Translation Control Register (VTCR) bits */
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#define VTCR_SH0 (3 << 12)
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#define VTCR_SH0 (3 << 12)
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@@ -161,17 +162,17 @@
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#define VTTBR_X (5 - KVM_T0SZ)
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#define VTTBR_X (5 - KVM_T0SZ)
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#endif
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#endif
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#define VTTBR_BADDR_SHIFT (VTTBR_X - 1)
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#define VTTBR_BADDR_SHIFT (VTTBR_X - 1)
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-#define VTTBR_BADDR_MASK (((1LLU << (40 - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT)
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-#define VTTBR_VMID_SHIFT (48LLU)
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-#define VTTBR_VMID_MASK (0xffLLU << VTTBR_VMID_SHIFT)
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+#define VTTBR_BADDR_MASK (((_AC(1, ULL) << (40 - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT)
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+#define VTTBR_VMID_SHIFT _AC(48, ULL)
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+#define VTTBR_VMID_MASK (_AC(0xff, ULL) << VTTBR_VMID_SHIFT)
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/* Hyp Syndrome Register (HSR) bits */
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/* Hyp Syndrome Register (HSR) bits */
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#define HSR_EC_SHIFT (26)
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#define HSR_EC_SHIFT (26)
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-#define HSR_EC (0x3fU << HSR_EC_SHIFT)
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-#define HSR_IL (1U << 25)
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+#define HSR_EC (_AC(0x3f, UL) << HSR_EC_SHIFT)
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+#define HSR_IL (_AC(1, UL) << 25)
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#define HSR_ISS (HSR_IL - 1)
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#define HSR_ISS (HSR_IL - 1)
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#define HSR_ISV_SHIFT (24)
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#define HSR_ISV_SHIFT (24)
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-#define HSR_ISV (1U << HSR_ISV_SHIFT)
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+#define HSR_ISV (_AC(1, UL) << HSR_ISV_SHIFT)
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#define HSR_SRT_SHIFT (16)
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#define HSR_SRT_SHIFT (16)
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#define HSR_SRT_MASK (0xf << HSR_SRT_SHIFT)
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#define HSR_SRT_MASK (0xf << HSR_SRT_SHIFT)
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#define HSR_FSC (0x3f)
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#define HSR_FSC (0x3f)
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@@ -179,9 +180,9 @@
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#define HSR_SSE (1 << 21)
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#define HSR_SSE (1 << 21)
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#define HSR_WNR (1 << 6)
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#define HSR_WNR (1 << 6)
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#define HSR_CV_SHIFT (24)
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#define HSR_CV_SHIFT (24)
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-#define HSR_CV (1U << HSR_CV_SHIFT)
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+#define HSR_CV (_AC(1, UL) << HSR_CV_SHIFT)
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#define HSR_COND_SHIFT (20)
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#define HSR_COND_SHIFT (20)
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-#define HSR_COND (0xfU << HSR_COND_SHIFT)
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+#define HSR_COND (_AC(0xf, UL) << HSR_COND_SHIFT)
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#define FSC_FAULT (0x04)
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#define FSC_FAULT (0x04)
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#define FSC_ACCESS (0x08)
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#define FSC_ACCESS (0x08)
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@@ -209,13 +210,13 @@
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#define HSR_EC_DABT (0x24)
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#define HSR_EC_DABT (0x24)
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#define HSR_EC_DABT_HYP (0x25)
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#define HSR_EC_DABT_HYP (0x25)
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-#define HSR_WFI_IS_WFE (1U << 0)
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+#define HSR_WFI_IS_WFE (_AC(1, UL) << 0)
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-#define HSR_HVC_IMM_MASK ((1UL << 16) - 1)
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+#define HSR_HVC_IMM_MASK ((_AC(1, UL) << 16) - 1)
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-#define HSR_DABT_S1PTW (1U << 7)
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-#define HSR_DABT_CM (1U << 8)
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-#define HSR_DABT_EA (1U << 9)
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+#define HSR_DABT_S1PTW (_AC(1, UL) << 7)
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+#define HSR_DABT_CM (_AC(1, UL) << 8)
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+#define HSR_DABT_EA (_AC(1, UL) << 9)
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#define kvm_arm_exception_type \
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#define kvm_arm_exception_type \
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{0, "RESET" }, \
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{0, "RESET" }, \
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