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+/*
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+ * clk-max77802.c - Clock driver for Maxim 77802
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+ *
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+ * Copyright (C) 2014 Google, Inc
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+ *
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+ * Copyright (C) 2012 Samsung Electornics
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+ * Jonghwa Lee <jonghwa3.lee@samsung.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * This driver is based on clk-max77686.c
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/slab.h>
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+#include <linux/err.h>
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+#include <linux/platform_device.h>
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+#include <linux/mfd/max77686-private.h>
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+#include <linux/clk-provider.h>
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+#include <linux/mutex.h>
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+#include <linux/clkdev.h>
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+
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+#include <dt-bindings/clock/maxim,max77802.h>
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+#include "clk-max-gen.h"
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+
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+#define MAX77802_CLOCK_OPMODE_MASK 0x1
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+#define MAX77802_CLOCK_LOW_JITTER_SHIFT 0x3
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+
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+static struct clk_init_data max77802_clks_init[MAX77802_CLKS_NUM] = {
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+ [MAX77802_CLK_32K_AP] = {
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+ .name = "32khz_ap",
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+ .ops = &max_gen_clk_ops,
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+ .flags = CLK_IS_ROOT,
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+ },
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+ [MAX77802_CLK_32K_CP] = {
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+ .name = "32khz_cp",
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+ .ops = &max_gen_clk_ops,
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+ .flags = CLK_IS_ROOT,
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+ },
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+};
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+
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+static int max77802_clk_probe(struct platform_device *pdev)
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+{
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+ struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent);
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+ int ret;
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+
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+ ret = max_gen_clk_probe(pdev, iodev->regmap, MAX77802_REG_32KHZ,
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+ max77802_clks_init, MAX77802_CLKS_NUM);
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+
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+ if (ret) {
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+ dev_err(&pdev->dev, "generic probe failed %d\n", ret);
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+ return ret;
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+ }
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+
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+ /* Enable low-jitter mode on the 32khz clocks. */
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+ ret = regmap_update_bits(iodev->regmap, MAX77802_REG_32KHZ,
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+ 1 << MAX77802_CLOCK_LOW_JITTER_SHIFT,
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+ 1 << MAX77802_CLOCK_LOW_JITTER_SHIFT);
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+ if (ret < 0)
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+ dev_err(&pdev->dev, "failed to enable low-jitter mode\n");
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+
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+ return ret;
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+}
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+
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+static int max77802_clk_remove(struct platform_device *pdev)
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+{
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+ return max_gen_clk_remove(pdev, MAX77802_CLKS_NUM);
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+}
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+
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+static const struct platform_device_id max77802_clk_id[] = {
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+ { "max77802-clk", 0},
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+ { },
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+};
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+MODULE_DEVICE_TABLE(platform, max77802_clk_id);
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+
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+static struct platform_driver max77802_clk_driver = {
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+ .driver = {
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+ .name = "max77802-clk",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = max77802_clk_probe,
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+ .remove = max77802_clk_remove,
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+ .id_table = max77802_clk_id,
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+};
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+
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+module_platform_driver(max77802_clk_driver);
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+
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+MODULE_DESCRIPTION("MAXIM 77802 Clock Driver");
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+MODULE_AUTHOR("Javier Martinez Canillas <javier.martinez@collabora.co.uk>");
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+MODULE_LICENSE("GPL");
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