|
@@ -104,7 +104,7 @@ enum xcan_reg {
|
|
#define XCAN_INTR_ALL (XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |\
|
|
#define XCAN_INTR_ALL (XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |\
|
|
XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK | \
|
|
XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK | \
|
|
XCAN_IXR_RXNEMP_MASK | XCAN_IXR_ERROR_MASK | \
|
|
XCAN_IXR_RXNEMP_MASK | XCAN_IXR_ERROR_MASK | \
|
|
- XCAN_IXR_ARBLST_MASK)
|
|
|
|
|
|
+ XCAN_IXR_RXOFLW_MASK | XCAN_IXR_ARBLST_MASK)
|
|
|
|
|
|
/* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */
|
|
/* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */
|
|
#define XCAN_BTR_SJW_SHIFT 7 /* Synchronous jump width */
|
|
#define XCAN_BTR_SJW_SHIFT 7 /* Synchronous jump width */
|