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+ACPI Tables
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+-----------
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+The expectations of individual ACPI tables are discussed in the list that
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+follows.
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+
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+If a section number is used, it refers to a section number in the ACPI
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+specification where the object is defined. If "Signature Reserved" is used,
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+the table signature (the first four bytes of the table) is the only portion
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+of the table recognized by the specification, and the actual table is defined
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+outside of the UEFI Forum (see Section 5.2.6 of the specification).
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+
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+For ACPI on arm64, tables also fall into the following categories:
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+
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+ -- Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
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+
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+ -- Recommended: BERT, EINJ, ERST, HEST, SSDT
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+
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+ -- Optional: BGRT, CPEP, CSRT, DRTM, ECDT, FACS, FPDT, MCHI, MPST,
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+ MSCT, RASF, SBST, SLIT, SPMI, SRAT, TCPA, TPM2, UEFI
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+
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+ -- Not supported: BOOT, DBG2, DBGP, DMAR, ETDT, HPET, IBFT, IVRS,
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+ LPIT, MSDM, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
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+
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+
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+Table Usage for ARMv8 Linux
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+----- ----------------------------------------------------------------
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+BERT Section 18.3 (signature == "BERT")
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+ == Boot Error Record Table ==
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+ Must be supplied if RAS support is provided by the platform. It
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+ is recommended this table be supplied.
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+
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+BOOT Signature Reserved (signature == "BOOT")
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+ == simple BOOT flag table ==
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+ Microsoft only table, will not be supported.
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+
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+BGRT Section 5.2.22 (signature == "BGRT")
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+ == Boot Graphics Resource Table ==
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+ Optional, not currently supported, with no real use-case for an
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+ ARM server.
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+
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+CPEP Section 5.2.18 (signature == "CPEP")
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+ == Corrected Platform Error Polling table ==
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+ Optional, not currently supported, and not recommended until such
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+ time as ARM-compatible hardware is available, and the specification
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+ suitably modified.
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+
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+CSRT Signature Reserved (signature == "CSRT")
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+ == Core System Resources Table ==
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+ Optional, not currently supported.
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+
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+DBG2 Signature Reserved (signature == "DBG2")
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+ == DeBuG port table 2 ==
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+ Microsoft only table, will not be supported.
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+
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+DBGP Signature Reserved (signature == "DBGP")
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+ == DeBuG Port table ==
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+ Microsoft only table, will not be supported.
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+
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+DSDT Section 5.2.11.1 (signature == "DSDT")
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+ == Differentiated System Description Table ==
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+ A DSDT is required; see also SSDT.
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+
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+ ACPI tables contain only one DSDT but can contain one or more SSDTs,
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+ which are optional. Each SSDT can only add to the ACPI namespace,
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+ but cannot modify or replace anything in the DSDT.
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+
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+DMAR Signature Reserved (signature == "DMAR")
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+ == DMA Remapping table ==
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+ x86 only table, will not be supported.
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+
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+DRTM Signature Reserved (signature == "DRTM")
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+ == Dynamic Root of Trust for Measurement table ==
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+ Optional, not currently supported.
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+
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+ECDT Section 5.2.16 (signature == "ECDT")
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+ == Embedded Controller Description Table ==
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+ Optional, not currently supported, but could be used on ARM if and
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+ only if one uses the GPE_BIT field to represent an IRQ number, since
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+ there are no GPE blocks defined in hardware reduced mode. This would
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+ need to be modified in the ACPI specification.
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+
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+EINJ Section 18.6 (signature == "EINJ")
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+ == Error Injection table ==
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+ This table is very useful for testing platform response to error
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+ conditions; it allows one to inject an error into the system as
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+ if it had actually occurred. However, this table should not be
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+ shipped with a production system; it should be dynamically loaded
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+ and executed with the ACPICA tools only during testing.
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+
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+ERST Section 18.5 (signature == "ERST")
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+ == Error Record Serialization Table ==
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+ On a platform supports RAS, this table must be supplied if it is not
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+ UEFI-based; if it is UEFI-based, this table may be supplied. When this
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+ table is not present, UEFI run time service will be utilized to save
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+ and retrieve hardware error information to and from a persistent store.
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+
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+ETDT Signature Reserved (signature == "ETDT")
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+ == Event Timer Description Table ==
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+ Obsolete table, will not be supported.
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+
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+FACS Section 5.2.10 (signature == "FACS")
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+ == Firmware ACPI Control Structure ==
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+ It is unlikely that this table will be terribly useful. If it is
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+ provided, the Global Lock will NOT be used since it is not part of
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+ the hardware reduced profile, and only 64-bit address fields will
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+ be considered valid.
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+
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+FADT Section 5.2.9 (signature == "FACP")
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+ == Fixed ACPI Description Table ==
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+ Required for arm64.
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+
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+ The HW_REDUCED_ACPI flag must be set. All of the fields that are
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+ to be ignored when HW_REDUCED_ACPI is set are expected to be set to
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+ zero.
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+
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+ If an FACS table is provided, the X_FIRMWARE_CTRL field is to be
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+ used, not FIRMWARE_CTRL.
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+
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+ If PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is
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+ filled in properly -- that the PSCI_COMPLIANT flag is set and that
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+ PSCI_USE_HVC is set or unset as needed (see table 5-37).
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+
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+ For the DSDT that is also required, the X_DSDT field is to be used,
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+ not the DSDT field.
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+
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+FPDT Section 5.2.23 (signature == "FPDT")
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+ == Firmware Performance Data Table ==
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+ Optional, not currently supported.
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+
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+GTDT Section 5.2.24 (signature == "GTDT")
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+ == Generic Timer Description Table ==
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+ Required for arm64.
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+
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+HEST Section 18.3.2 (signature == "HEST")
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+ == Hardware Error Source Table ==
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+ Until further error source types are defined, use only types 6 (AER
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+ Root Port), 7 (AER Endpoint), 8 (AER Bridge), or 9 (Generic Hardware
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+ Error Source). Firmware first error handling is possible if and only
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+ if Trusted Firmware is being used on arm64.
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+
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+ Must be supplied if RAS support is provided by the platform. It
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+ is recommended this table be supplied.
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+
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+HPET Signature Reserved (signature == "HPET")
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+ == High Precision Event timer Table ==
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+ x86 only table, will not be supported.
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+
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+IBFT Signature Reserved (signature == "IBFT")
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+ == iSCSI Boot Firmware Table ==
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+ Microsoft defined table, support TBD.
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+
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+IVRS Signature Reserved (signature == "IVRS")
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+ == I/O Virtualization Reporting Structure ==
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+ x86_64 (AMD) only table, will not be supported.
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+
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+LPIT Signature Reserved (signature == "LPIT")
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+ == Low Power Idle Table ==
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+ x86 only table as of ACPI 5.1; future versions have been adapted for
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+ use with ARM and will be recommended in order to support ACPI power
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+ management.
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+
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+MADT Section 5.2.12 (signature == "APIC")
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+ == Multiple APIC Description Table ==
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+ Required for arm64. Only the GIC interrupt controller structures
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+ should be used (types 0xA - 0xE).
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+
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+MCFG Signature Reserved (signature == "MCFG")
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+ == Memory-mapped ConFiGuration space ==
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+ If the platform supports PCI/PCIe, an MCFG table is required.
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+
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+MCHI Signature Reserved (signature == "MCHI")
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+ == Management Controller Host Interface table ==
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+ Optional, not currently supported.
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+
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+MPST Section 5.2.21 (signature == "MPST")
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+ == Memory Power State Table ==
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+ Optional, not currently supported.
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+
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+MSDM Signature Reserved (signature == "MSDM")
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+ == Microsoft Data Management table ==
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+ Microsoft only table, will not be supported.
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+
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+MSCT Section 5.2.19 (signature == "MSCT")
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+ == Maximum System Characteristic Table ==
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+ Optional, not currently supported.
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+
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+RASF Section 5.2.20 (signature == "RASF")
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+ == RAS Feature table ==
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+ Optional, not currently supported.
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+
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+RSDP Section 5.2.5 (signature == "RSD PTR")
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+ == Root System Description PoinTeR ==
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+ Required for arm64.
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+
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+RSDT Section 5.2.7 (signature == "RSDT")
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+ == Root System Description Table ==
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+ Since this table can only provide 32-bit addresses, it is deprecated
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+ on arm64, and will not be used.
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+
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+SBST Section 5.2.14 (signature == "SBST")
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+ == Smart Battery Subsystem Table ==
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+ Optional, not currently supported.
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+
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+SLIC Signature Reserved (signature == "SLIC")
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+ == Software LIcensing table ==
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+ Microsoft only table, will not be supported.
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+
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+SLIT Section 5.2.17 (signature == "SLIT")
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+ == System Locality distance Information Table ==
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+ Optional in general, but required for NUMA systems.
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+
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+SPCR Signature Reserved (signature == "SPCR")
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+ == Serial Port Console Redirection table ==
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+ Required for arm64.
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+
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+SPMI Signature Reserved (signature == "SPMI")
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+ == Server Platform Management Interface table ==
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+ Optional, not currently supported.
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+
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+SRAT Section 5.2.16 (signature == "SRAT")
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+ == System Resource Affinity Table ==
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+ Optional, but if used, only the GICC Affinity structures are read.
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+ To support NUMA, this table is required.
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+
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+SSDT Section 5.2.11.2 (signature == "SSDT")
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+ == Secondary System Description Table ==
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+ These tables are a continuation of the DSDT; these are recommended
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+ for use with devices that can be added to a running system, but can
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+ also serve the purpose of dividing up device descriptions into more
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+ manageable pieces.
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+
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+ An SSDT can only ADD to the ACPI namespace. It cannot modify or
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+ replace existing device descriptions already in the namespace.
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+
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+ These tables are optional, however. ACPI tables should contain only
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+ one DSDT but can contain many SSDTs.
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+
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+TCPA Signature Reserved (signature == "TCPA")
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+ == Trusted Computing Platform Alliance table ==
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+ Optional, not currently supported, and may need changes to fully
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+ interoperate with arm64.
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+
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+TPM2 Signature Reserved (signature == "TPM2")
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+ == Trusted Platform Module 2 table ==
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+ Optional, not currently supported, and may need changes to fully
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+ interoperate with arm64.
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+
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+UEFI Signature Reserved (signature == "UEFI")
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+ == UEFI ACPI data table ==
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+ Optional, not currently supported. No known use case for arm64,
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+ at present.
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+
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+WAET Signature Reserved (signature == "WAET")
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+ == Windows ACPI Emulated devices Table ==
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+ Microsoft only table, will not be supported.
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+
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+WDAT Signature Reserved (signature == "WDAT")
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+ == Watch Dog Action Table ==
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+ Microsoft only table, will not be supported.
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+
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+WDRT Signature Reserved (signature == "WDRT")
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+ == Watch Dog Resource Table ==
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+ Microsoft only table, will not be supported.
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+
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+WPBT Signature Reserved (signature == "WPBT")
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+ == Windows Platform Binary Table ==
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+ Microsoft only table, will not be supported.
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+
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+XSDT Section 5.2.8 (signature == "XSDT")
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+ == eXtended System Description Table ==
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+ Required for arm64.
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+
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+
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+ACPI Objects
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+------------
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+The expectations on individual ACPI objects are discussed in the list that
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+follows:
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+
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+Name Section Usage for ARMv8 Linux
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+---- ------------ -------------------------------------------------
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+_ADR 6.1.1 Use as needed.
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+
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+_BBN 6.5.5 Use as needed; PCI-specific.
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+
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+_BDN 6.5.3 Optional; not likely to be used on arm64.
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+
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+_CCA 6.2.17 This method should be defined for all bus masters
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+ on arm64. While cache coherency is assumed, making
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+ it explicit ensures the kernel will set up DMA as
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+ it should.
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+
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+_CDM 6.2.1 Optional, to be used only for processor devices.
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+
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+_CID 6.1.2 Use as needed.
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+
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+_CLS 6.1.3 Use as needed.
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+
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+_CRS 6.2.2 Required on arm64.
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+
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+_DCK 6.5.2 Optional; not likely to be used on arm64.
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+
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+_DDN 6.1.4 This field can be used for a device name. However,
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+ it is meant for DOS device names (e.g., COM1), so be
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+ careful of its use across OSes.
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+
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+_DEP 6.5.8 Use as needed.
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+
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+_DIS 6.2.3 Optional, for power management use.
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+
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+_DLM 5.7.5 Optional.
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+
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+_DMA 6.2.4 Optional.
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+
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+_DSD 6.2.5 To be used with caution. If this object is used, try
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+ to use it within the constraints already defined by the
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+ Device Properties UUID. Only in rare circumstances
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+ should it be necessary to create a new _DSD UUID.
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+
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+ In either case, submit the _DSD definition along with
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+ any driver patches for discussion, especially when
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+ device properties are used. A driver will not be
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+ considered complete without a corresponding _DSD
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+ description. Once approved by kernel maintainers,
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+ the UUID or device properties must then be registered
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+ with the UEFI Forum; this may cause some iteration as
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+ more than one OS will be registering entries.
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+
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+_DSM Do not use this method. It is not standardized, the
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+ return values are not well documented, and it is
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+ currently a frequent source of error.
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+
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+_DSW 7.2.1 Use as needed; power management specific.
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+
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+_EDL 6.3.1 Optional.
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+
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+_EJD 6.3.2 Optional.
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+
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+_EJx 6.3.3 Optional.
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+
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+_FIX 6.2.7 x86 specific, not used on arm64.
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+
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+\_GL 5.7.1 This object is not to be used in hardware reduced
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+ mode, and therefore should not be used on arm64.
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+
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+_GLK 6.5.7 This object requires a global lock be defined; there
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+ is no global lock on arm64 since it runs in hardware
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+ reduced mode. Hence, do not use this object on arm64.
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+
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+\_GPE 5.3.1 This namespace is for x86 use only. Do not use it
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+ on arm64.
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+
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+_GSB 6.2.7 Optional.
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+
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+_HID 6.1.5 Use as needed. This is the primary object to use in
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+ device probing, though _CID and _CLS may also be used.
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+
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+_HPP 6.2.8 Optional, PCI specific.
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+
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+_HPX 6.2.9 Optional, PCI specific.
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+
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+_HRV 6.1.6 Optional, use as needed to clarify device behavior; in
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+ some cases, this may be easier to use than _DSD.
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+
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+_INI 6.5.1 Not required, but can be useful in setting up devices
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+ when UEFI leaves them in a state that may not be what
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+ the driver expects before it starts probing.
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+
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+_IRC 7.2.15 Use as needed; power management specific.
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+
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+_LCK 6.3.4 Optional.
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+
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+_MAT 6.2.10 Optional; see also the MADT.
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+
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+_MLS 6.1.7 Optional, but highly recommended for use in
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+ internationalization.
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+
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+_OFF 7.1.2 It is recommended to define this method for any device
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+ that can be turned on or off.
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+
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+_ON 7.1.3 It is recommended to define this method for any device
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+ that can be turned on or off.
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+
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+\_OS 5.7.3 This method will return "Linux" by default (this is
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+ the value of the macro ACPI_OS_NAME on Linux). The
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+ command line parameter acpi_os=<string> can be used
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+ to set it to some other value.
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+
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+_OSC 6.2.11 This method can be a global method in ACPI (i.e.,
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+ \_SB._OSC), or it may be associated with a specific
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+ device (e.g., \_SB.DEV0._OSC), or both. When used
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+ as a global method, only capabilities published in
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+ the ACPI specification are allowed. When used as
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+ a device-specific method, the process described for
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+ using _DSD MUST be used to create an _OSC definition;
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+ out-of-process use of _OSC is not allowed. That is,
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+ submit the device-specific _OSC usage description as
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+ part of the kernel driver submission, get it approved
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|
|
+ by the kernel community, then register it with the
|
|
|
+ UEFI Forum.
|
|
|
+
|
|
|
+\_OSI 5.7.2 Deprecated on ARM64. Any invocation of this method
|
|
|
+ will print a warning on the console and return false.
|
|
|
+ That is, as far as ACPI firmware is concerned, _OSI
|
|
|
+ cannot be used to determine what sort of system is
|
|
|
+ being used or what functionality is provided. The
|
|
|
+ _OSC method is to be used instead.
|
|
|
+
|
|
|
+_OST 6.3.5 Optional.
|
|
|
+
|
|
|
+_PDC 8.4.1 Deprecated, do not use on arm64.
|
|
|
+
|
|
|
+\_PIC 5.8.1 The method should not be used. On arm64, the only
|
|
|
+ interrupt model available is GIC.
|
|
|
+
|
|
|
+_PLD 6.1.8 Optional.
|
|
|
+
|
|
|
+\_PR 5.3.1 This namespace is for x86 use only on legacy systems.
|
|
|
+ Do not use it on arm64.
|
|
|
+
|
|
|
+_PRS 6.2.12 Optional.
|
|
|
+
|
|
|
+_PRT 6.2.13 Required as part of the definition of all PCI root
|
|
|
+ devices.
|
|
|
+
|
|
|
+_PRW 7.2.13 Use as needed; power management specific.
|
|
|
+
|
|
|
+_PRx 7.2.8-11 Use as needed; power management specific. If _PR0 is
|
|
|
+ defined, _PR3 must also be defined.
|
|
|
+
|
|
|
+_PSC 7.2.6 Use as needed; power management specific.
|
|
|
+
|
|
|
+_PSE 7.2.7 Use as needed; power management specific.
|
|
|
+
|
|
|
+_PSW 7.2.14 Use as needed; power management specific.
|
|
|
+
|
|
|
+_PSx 7.2.2-5 Use as needed; power management specific. If _PS0 is
|
|
|
+ defined, _PS3 must also be defined. If clocks or
|
|
|
+ regulators need adjusting to be consistent with power
|
|
|
+ usage, change them in these methods.
|
|
|
+
|
|
|
+\_PTS 7.3.1 Use as needed; power management specific.
|
|
|
+
|
|
|
+_PXM 6.2.14 Optional.
|
|
|
+
|
|
|
+_REG 6.5.4 Use as needed.
|
|
|
+
|
|
|
+\_REV 5.7.4 Always returns the latest version of ACPI supported.
|
|
|
+
|
|
|
+_RMV 6.3.6 Optional.
|
|
|
+
|
|
|
+\_SB 5.3.1 Required on arm64; all devices must be defined in this
|
|
|
+ namespace.
|
|
|
+
|
|
|
+_SEG 6.5.6 Use as needed; PCI-specific.
|
|
|
+
|
|
|
+\_SI 5.3.1, Optional.
|
|
|
+ 9.1
|
|
|
+
|
|
|
+_SLI 6.2.15 Optional; recommended when SLIT table is in use.
|
|
|
+
|
|
|
+_STA 6.3.7, It is recommended to define this method for any device
|
|
|
+ 7.1.4 that can be turned on or off.
|
|
|
+
|
|
|
+_SRS 6.2.16 Optional; see also _PRS.
|
|
|
+
|
|
|
+_STR 6.1.10 Recommended for conveying device names to end users;
|
|
|
+ this is preferred over using _DDN.
|
|
|
+
|
|
|
+_SUB 6.1.9 Use as needed; _HID or _CID are preferred.
|
|
|
+
|
|
|
+_SUN 6.1.11 Optional.
|
|
|
+
|
|
|
+\_Sx 7.3.2 Use as needed; power management specific.
|
|
|
+
|
|
|
+_SxD 7.2.16-19 Use as needed; power management specific.
|
|
|
+
|
|
|
+_SxW 7.2.20-24 Use as needed; power management specific.
|
|
|
+
|
|
|
+_SWS 7.3.3 Use as needed; power management specific; this may
|
|
|
+ require specification changes for use on arm64.
|
|
|
+
|
|
|
+\_TTS 7.3.4 Use as needed; power management specific.
|
|
|
+
|
|
|
+\_TZ 5.3.1 Optional.
|
|
|
+
|
|
|
+_UID 6.1.12 Recommended for distinguishing devices of the same
|
|
|
+ class; define it if at all possible.
|
|
|
+
|
|
|
+\_WAK 7.3.5 Use as needed; power management specific.
|
|
|
+
|
|
|
+
|
|
|
+ACPI Event Model
|
|
|
+----------------
|
|
|
+Do not use GPE block devices; these are not supported in the hardware reduced
|
|
|
+profile used by arm64. Since there are no GPE blocks defined for use on ARM
|
|
|
+platforms, GPIO-signaled interrupts should be used for creating system events.
|
|
|
+
|
|
|
+
|
|
|
+ACPI Processor Control
|
|
|
+----------------------
|
|
|
+Section 8 of the ACPI specification is currently undergoing change that
|
|
|
+should be completed in the 6.0 version of the specification. Processor
|
|
|
+performance control will be handled differently for arm64 at that point
|
|
|
+in time. Processor aggregator devices (section 8.5) will not be used,
|
|
|
+for example, but another similar mechanism instead.
|
|
|
+
|
|
|
+While UEFI constrains what we can say until the release of 6.0, it is
|
|
|
+recommended that CPPC (8.4.5) be used as the primary model. This will
|
|
|
+still be useful into the future. C-states and P-states will still be
|
|
|
+provided, but most of the current design work appears to favor CPPC.
|
|
|
+
|
|
|
+Further, it is essential that the ARMv8 SoC provide a fully functional
|
|
|
+implementation of PSCI; this will be the only mechanism supported by ACPI
|
|
|
+to control CPU power state (including secondary CPU booting).
|
|
|
+
|
|
|
+More details will be provided on the release of the ACPI 6.0 specification.
|
|
|
+
|
|
|
+
|
|
|
+ACPI System Address Map Interfaces
|
|
|
+----------------------------------
|
|
|
+In Section 15 of the ACPI specification, several methods are mentioned as
|
|
|
+possible mechanisms for conveying memory resource information to the kernel.
|
|
|
+For arm64, we will only support UEFI for booting with ACPI, hence the UEFI
|
|
|
+GetMemoryMap() boot service is the only mechanism that will be used.
|
|
|
+
|
|
|
+
|
|
|
+ACPI Platform Error Interfaces (APEI)
|
|
|
+-------------------------------------
|
|
|
+The APEI tables supported are described above.
|
|
|
+
|
|
|
+APEI requires the equivalent of an SCI and an NMI on ARMv8. The SCI is used
|
|
|
+to notify the OSPM of errors that have occurred but can be corrected and the
|
|
|
+system can continue correct operation, even if possibly degraded. The NMI is
|
|
|
+used to indicate fatal errors that cannot be corrected, and require immediate
|
|
|
+attention.
|
|
|
+
|
|
|
+Since there is no direct equivalent of the x86 SCI or NMI, arm64 handles
|
|
|
+these slightly differently. The SCI is handled as a normal GPIO-signaled
|
|
|
+interrupt; given that these are corrected (or correctable) errors being
|
|
|
+reported, this is sufficient. The NMI is emulated as the highest priority
|
|
|
+GPIO-signaled interrupt possible. This implies some caution must be used
|
|
|
+since there could be interrupts at higher privilege levels or even interrupts
|
|
|
+at the same priority as the emulated NMI. In Linux, this should not be the
|
|
|
+case but one should be aware it could happen.
|
|
|
+
|
|
|
+
|
|
|
+ACPI Objects Not Supported on ARM64
|
|
|
+-----------------------------------
|
|
|
+While this may change in the future, there are several classes of objects
|
|
|
+that can be defined, but are not currently of general interest to ARM servers.
|
|
|
+
|
|
|
+These are not supported:
|
|
|
+
|
|
|
+ -- Section 9.2: ambient light sensor devices
|
|
|
+
|
|
|
+ -- Section 9.3: battery devices
|
|
|
+
|
|
|
+ -- Section 9.4: lids (e.g., laptop lids)
|
|
|
+
|
|
|
+ -- Section 9.8.2: IDE controllers
|
|
|
+
|
|
|
+ -- Section 9.9: floppy controllers
|
|
|
+
|
|
|
+ -- Section 9.10: GPE block devices
|
|
|
+
|
|
|
+ -- Section 9.15: PC/AT RTC/CMOS devices
|
|
|
+
|
|
|
+ -- Section 9.16: user presence detection devices
|
|
|
+
|
|
|
+ -- Section 9.17: I/O APIC devices; all GICs must be enumerable via MADT
|
|
|
+
|
|
|
+ -- Section 9.18: time and alarm devices (see 9.15)
|
|
|
+
|
|
|
+
|
|
|
+ACPI Objects Not Yet Implemented
|
|
|
+--------------------------------
|
|
|
+While these objects have x86 equivalents, and they do make some sense in ARM
|
|
|
+servers, there is either no hardware available at present, or in some cases
|
|
|
+there may not yet be a non-ARM implementation. Hence, they are currently not
|
|
|
+implemented though that may change in the future.
|
|
|
+
|
|
|
+Not yet implemented are:
|
|
|
+
|
|
|
+ -- Section 10: power source and power meter devices
|
|
|
+
|
|
|
+ -- Section 11: thermal management
|
|
|
+
|
|
|
+ -- Section 12: embedded controllers interface
|
|
|
+
|
|
|
+ -- Section 13: SMBus interfaces
|
|
|
+
|
|
|
+ -- Section 17: NUMA support (prototypes have been submitted for
|
|
|
+ review)
|