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@@ -330,8 +330,6 @@ EXPORT_SYMBOL(clk_get_rate);
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/*------------------------------------------------------------------------*/
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-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
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-
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/*
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* For now, only the programmable clocks support reparenting (MCK could
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* do this too, with care) or rate changing (the PLLs could do this too,
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@@ -459,8 +457,6 @@ static void __init init_programmable_clock(struct clk *clk)
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clk->rate_hz = parent->rate_hz / pmc_prescaler_divider(pckr);
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}
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-#endif /* CONFIG_AT91_PROGRAMMABLE_CLOCKS */
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-
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/*------------------------------------------------------------------------*/
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#ifdef CONFIG_DEBUG_FS
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@@ -577,12 +573,10 @@ int __init clk_register(struct clk *clk)
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clk->parent = &mck;
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clk->mode = pmc_sys_mode;
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}
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-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
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else if (clk_is_programmable(clk)) {
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clk->mode = pmc_sys_mode;
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init_programmable_clock(clk);
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}
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-#endif
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at91_clk_add(clk);
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