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@@ -1660,11 +1660,18 @@ static u32 gfx_v6_0_ring_get_rptr(struct amdgpu_ring *ring)
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return ring->adev->wb.wb[ring->rptr_offs];
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}
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-static u32 gfx_v6_0_ring_get_wptr_gfx(struct amdgpu_ring *ring)
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+static u32 gfx_v6_0_ring_get_wptr(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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- return RREG32(CP_RB0_WPTR);
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+ if (ring == &adev->gfx.gfx_ring[0])
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+ return RREG32(CP_RB0_WPTR);
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+ else if (ring == &adev->gfx.compute_ring[0])
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+ return RREG32(CP_RB1_WPTR);
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+ else if (ring == &adev->gfx.compute_ring[1])
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+ return RREG32(CP_RB2_WPTR);
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+ else
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+ BUG();
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}
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static void gfx_v6_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
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@@ -1675,22 +1682,6 @@ static void gfx_v6_0_ring_set_wptr_gfx(struct amdgpu_ring *ring)
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(void)RREG32(CP_RB0_WPTR);
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}
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-static u32 gfx_v6_0_ring_get_wptr_compute(struct amdgpu_ring *ring)
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-{
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- struct amdgpu_device *adev = ring->adev;
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- u32 wptr;
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-
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- if (ring == &adev->gfx.compute_ring[0]) {
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- wptr = RREG32(CP_RB1_WPTR);
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- } else if (ring == &adev->gfx.compute_ring[1]) {
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- wptr = RREG32(CP_RB2_WPTR);
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- } else {
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- BUG();
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- }
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-
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- return wptr;
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-}
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-
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static void gfx_v6_0_ring_set_wptr_compute(struct amdgpu_ring *ring)
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{
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struct amdgpu_device *adev = ring->adev;
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@@ -3125,7 +3116,7 @@ const struct amd_ip_funcs gfx_v6_0_ip_funcs = {
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static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
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.get_rptr = gfx_v6_0_ring_get_rptr,
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- .get_wptr = gfx_v6_0_ring_get_wptr_gfx,
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+ .get_wptr = gfx_v6_0_ring_get_wptr,
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.set_wptr = gfx_v6_0_ring_set_wptr_gfx,
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.parse_cs = NULL,
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.emit_ib = gfx_v6_0_ring_emit_ib_gfx,
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@@ -3142,7 +3133,7 @@ static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_gfx = {
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static const struct amdgpu_ring_funcs gfx_v6_0_ring_funcs_compute = {
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.get_rptr = gfx_v6_0_ring_get_rptr,
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- .get_wptr = gfx_v6_0_ring_get_wptr_compute,
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+ .get_wptr = gfx_v6_0_ring_get_wptr,
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.set_wptr = gfx_v6_0_ring_set_wptr_compute,
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.parse_cs = NULL,
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.emit_ib = gfx_v6_0_ring_emit_ib_compute,
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