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@@ -834,6 +834,26 @@ static int r600_parse_clk_voltage_dep_table(struct radeon_clock_voltage_dependen
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return 0;
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return 0;
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}
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}
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+int r600_get_platform_caps(struct radeon_device *rdev)
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+{
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+ struct radeon_mode_info *mode_info = &rdev->mode_info;
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+ union power_info *power_info;
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+ int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo);
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+ u16 data_offset;
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+ u8 frev, crev;
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+
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+ if (!atom_parse_data_header(mode_info->atom_context, index, NULL,
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+ &frev, &crev, &data_offset))
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+ return -EINVAL;
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+ power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);
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+
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+ rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);
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+ rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);
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+ rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);
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+
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+ return 0;
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+}
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+
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/* sizeof(ATOM_PPLIB_EXTENDEDHEADER) */
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/* sizeof(ATOM_PPLIB_EXTENDEDHEADER) */
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#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V2 12
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#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V2 12
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#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3 14
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#define SIZE_OF_ATOM_PPLIB_EXTENDEDHEADER_V3 14
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