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@@ -1,4 +1,109 @@
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-Atmel NAND flash
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+Atmel NAND flash controller bindings
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+
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+The NAND flash controller node should be defined under the EBI bus (see
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+Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
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+One or several NAND devices can be defined under this NAND controller.
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+The NAND controller might be connected to an ECC engine.
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+
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+* NAND controller bindings:
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+
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+Required properties:
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+- compatible: should be one of the following
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+ "atmel,at91rm9200-nand-controller"
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+ "atmel,at91sam9260-nand-controller"
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+ "atmel,at91sam9261-nand-controller"
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+ "atmel,at91sam9g45-nand-controller"
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+ "atmel,sama5d3-nand-controller"
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+- ranges: empty ranges property to forward EBI ranges definitions.
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+- #address-cells: should be set to 2.
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+- #size-cells: should be set to 1.
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+- atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3
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+ controllers.
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+- atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3
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+ controllers.
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+
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+Optional properties:
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+- ecc-engine: phandle to the PMECC block. Only meaningful if the SoC embeds
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+ a PMECC engine.
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+
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+* NAND device/chip bindings:
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+
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+Required properties:
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+- reg: describes the CS lines assigned to the NAND device. If the NAND device
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+ exposes multiple CS lines (multi-dies chips), your reg property will
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+ contain X tuples of 3 entries.
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+ 1st entry: the CS line this NAND chip is connected to
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+ 2nd entry: the base offset of the memory region assigned to this
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+ device (always 0)
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+ 3rd entry: the memory region size (always 0x800000)
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+
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+Optional properties:
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+- rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND.
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+- cs-gpios: the GPIO(s) used to control the CS line.
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+- det-gpios: the GPIO used to detect if a Smartmedia Card is present.
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+- atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful
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+ on sama5 SoCs.
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+
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+All generic properties described in
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+Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND
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+device node, and NAND partitions should be defined under the NAND node as
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+described in Documentation/devicetree/bindings/mtd/partition.txt.
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+
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+* ECC engine (PMECC) bindings:
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+
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+Required properties:
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+- compatible: should be one of the following
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+ "atmel,at91sam9g45-pmecc"
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+ "atmel,sama5d4-pmecc"
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+ "atmel,sama5d2-pmecc"
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+- reg: should contain 2 register ranges. The first one is pointing to the PMECC
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+ block, and the second one to the PMECC_ERRLOC block.
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+
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+Example:
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+
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+ pmecc: ecc-engine@ffffc070 {
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+ compatible = "atmel,at91sam9g45-pmecc";
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+ reg = <0xffffc070 0x490>,
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+ <0xffffc500 0x100>;
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+ };
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+
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+ ebi: ebi@10000000 {
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+ compatible = "atmel,sama5d3-ebi";
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+ atmel,smc = <&hsmc>;
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+ reg = <0x10000000 0x10000000
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+ 0x40000000 0x30000000>;
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+ ranges = <0x0 0x0 0x10000000 0x10000000
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+ 0x1 0x0 0x40000000 0x10000000
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+ 0x2 0x0 0x50000000 0x10000000
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+ 0x3 0x0 0x60000000 0x10000000>;
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+ clocks = <&mck>;
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+
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+ nand_controller: nand-controller {
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+ compatible = "atmel,sama5d3-nand-controller";
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+ atmel,nfc-sram = <&nfc_sram>;
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+ atmel,nfc-io = <&nfc_io>;
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+ ecc-engine = <&pmecc>;
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+ #address-cells = <2>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ nand@3 {
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+ reg = <0x3 0x0 0x800000>;
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+ atmel,rb = <0>;
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+
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+ /*
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+ * Put generic NAND/MTD properties and
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+ * subnodes here.
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+ */
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+ };
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+ };
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+ };
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+
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+-----------------------------------------------------------------------
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+
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+Deprecated bindings (should not be used in new device trees):
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Required properties:
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- compatible: The possible values are:
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