|
@@ -623,21 +623,6 @@ struct dmadscr {
|
|
|
u64 pad_b;
|
|
|
} ____cacheline_aligned_in_smp page_descr[DM_NUM_CHANNELS];
|
|
|
|
|
|
-void sb1_dma_init(void)
|
|
|
-{
|
|
|
- int i;
|
|
|
-
|
|
|
- for (i = 0; i < DM_NUM_CHANNELS; i++) {
|
|
|
- const u64 base_val = CPHYSADDR((unsigned long)&page_descr[i]) |
|
|
|
- V_DM_DSCR_BASE_RINGSZ(1);
|
|
|
- void *base_reg = IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
|
|
|
-
|
|
|
- __raw_writeq(base_val, base_reg);
|
|
|
- __raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
|
|
|
- __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL, base_reg);
|
|
|
- }
|
|
|
-}
|
|
|
-
|
|
|
void clear_page(void *page)
|
|
|
{
|
|
|
u64 to_phys = CPHYSADDR((unsigned long)page);
|