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@@ -172,6 +172,7 @@
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = _chan, \
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+ .address = _chan, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_AVERAGE_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
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@@ -323,10 +324,10 @@ static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev,
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regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, ®val);
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fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval);
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- if (fifo_chan != chan->channel) {
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+ if (fifo_chan != chan->address) {
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dev_err(&indio_dev->dev,
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- "ADC FIFO entry belongs to channel %d instead of %d\n",
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- fifo_chan, chan->channel);
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+ "ADC FIFO entry belongs to channel %d instead of %lu\n",
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+ fifo_chan, chan->address);
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return -EINVAL;
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}
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@@ -343,16 +344,16 @@ static void meson_sar_adc_set_averaging(struct iio_dev *indio_dev,
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enum meson_sar_adc_num_samples samples)
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{
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struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
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- int val, channel = chan->channel;
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+ int val, address = chan->address;
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- val = samples << MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_SHIFT(channel);
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+ val = samples << MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_SHIFT(address);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_AVG_CNTL,
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- MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_MASK(channel),
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+ MESON_SAR_ADC_AVG_CNTL_NUM_SAMPLES_MASK(address),
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val);
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- val = mode << MESON_SAR_ADC_AVG_CNTL_AVG_MODE_SHIFT(channel);
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+ val = mode << MESON_SAR_ADC_AVG_CNTL_AVG_MODE_SHIFT(address);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_AVG_CNTL,
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- MESON_SAR_ADC_AVG_CNTL_AVG_MODE_MASK(channel), val);
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+ MESON_SAR_ADC_AVG_CNTL_AVG_MODE_MASK(address), val);
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}
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static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev,
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@@ -372,23 +373,23 @@ static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev,
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/* map channel index 0 to the channel which we want to read */
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regval = FIELD_PREP(MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(0),
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- chan->channel);
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+ chan->address);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_CHAN_LIST,
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MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(0), regval);
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regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK,
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- chan->channel);
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+ chan->address);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_DETECT_IDLE_SW,
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MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK,
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regval);
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regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK,
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- chan->channel);
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+ chan->address);
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_DETECT_IDLE_SW,
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MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK,
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regval);
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- if (chan->channel == 6)
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+ if (chan->address == 6)
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regmap_update_bits(priv->regmap, MESON_SAR_ADC_DELTA_10,
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MESON_SAR_ADC_DELTA_10_TEMP_SEL, 0);
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}
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@@ -526,8 +527,8 @@ static int meson_sar_adc_get_sample(struct iio_dev *indio_dev,
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if (ret) {
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dev_warn(indio_dev->dev.parent,
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- "failed to read sample for channel %d: %d\n",
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- chan->channel, ret);
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+ "failed to read sample for channel %lu: %d\n",
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+ chan->address, ret);
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return ret;
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}
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