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@@ -380,7 +380,7 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
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execlists_context_status_change(port[0].request,
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INTEL_CONTEXT_SCHEDULE_IN);
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desc[0] = execlists_update_context(port[0].request);
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- engine->preempt_wa = port[0].count++; /* bdw only? fixed on skl? */
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+ port[0].count++;
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if (port[1].request) {
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GEM_BUG_ON(port[1].count);
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@@ -545,15 +545,11 @@ bool intel_execlists_idle(struct drm_i915_private *dev_priv)
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return true;
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}
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-static bool execlists_elsp_ready(struct intel_engine_cs *engine)
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+static bool execlists_elsp_ready(const struct intel_engine_cs *engine)
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{
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- int port;
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+ const struct execlist_port *port = engine->execlist_port;
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- port = 1; /* wait for a free slot */
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- if (engine->preempt_wa)
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- port = 0; /* wait for GPU to be idle before continuing */
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-
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- return !engine->execlist_port[port].request;
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+ return port[0].count + port[1].count < 2;
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}
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/*
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@@ -601,8 +597,6 @@ static void intel_lrc_irq_handler(unsigned long data)
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i915_gem_request_put(port[0].request);
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port[0] = port[1];
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memset(&port[1], 0, sizeof(port[1]));
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-
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- engine->preempt_wa = false;
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}
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GEM_BUG_ON(port[0].count == 0 &&
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