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@@ -343,31 +343,34 @@ static const struct intel_device_info intel_skylake_gt3_info = {
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.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
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};
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+#define GEN9_LP_FEATURES \
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+ .gen = 9, \
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+ .has_hotplug = 1, \
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+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
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+ .num_pipes = 3, \
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+ .has_64bit_reloc = 1, \
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+ .has_ddi = 1, \
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+ .has_fpga_dbg = 1, \
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+ .has_fbc = 1, \
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+ .has_runtime_pm = 1, \
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+ .has_pooled_eu = 0, \
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+ .has_csr = 1, \
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+ .has_resource_streamer = 1, \
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+ .has_rc6 = 1, \
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+ .has_dp_mst = 1, \
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+ .has_gmbus_irq = 1, \
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+ .has_hw_contexts = 1, \
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+ .has_logical_ring_contexts = 1, \
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+ .has_guc = 1, \
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+ .has_decoupled_mmio = 1, \
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+ GEN_DEFAULT_PIPEOFFSETS, \
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+ IVB_CURSOR_OFFSETS, \
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+ BDW_COLORS
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+
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static const struct intel_device_info intel_broxton_info = {
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.is_broxton = 1,
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- .gen = 9,
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- .has_hotplug = 1,
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- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
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- .num_pipes = 3,
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- .has_64bit_reloc = 1,
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- .has_ddi = 1,
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- .has_fpga_dbg = 1,
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- .has_fbc = 1,
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- .has_runtime_pm = 1,
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- .has_pooled_eu = 0,
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- .has_csr = 1,
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- .has_resource_streamer = 1,
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- .has_rc6 = 1,
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- .has_dp_mst = 1,
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- .has_gmbus_irq = 1,
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- .has_hw_contexts = 1,
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- .has_logical_ring_contexts = 1,
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- .has_guc = 1,
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- .has_decoupled_mmio = 1,
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+ GEN9_LP_FEATURES,
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.ddb_size = 512,
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- GEN_DEFAULT_PIPEOFFSETS,
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- IVB_CURSOR_OFFSETS,
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- BDW_COLORS,
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};
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static const struct intel_device_info intel_kabylake_info = {
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