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@@ -92,13 +92,6 @@ static inline void gic_update_bits(unsigned int reg, unsigned long mask,
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gic_write(reg, regval);
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}
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-static inline void gic_set_polarity(unsigned int intr, unsigned int pol)
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-{
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- gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_POLARITY) +
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- GIC_INTR_OFS(intr), 1ul << GIC_INTR_BIT(intr),
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- (unsigned long)pol << GIC_INTR_BIT(intr));
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-}
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-
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static inline void gic_set_trigger(unsigned int intr, unsigned int trig)
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{
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gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_TRIGGER) +
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@@ -272,13 +265,13 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
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spin_lock_irqsave(&gic_lock, flags);
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switch (type & IRQ_TYPE_SENSE_MASK) {
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case IRQ_TYPE_EDGE_FALLING:
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- gic_set_polarity(irq, GIC_POL_NEG);
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+ change_gic_pol(irq, GIC_POL_FALLING_EDGE);
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gic_set_trigger(irq, GIC_TRIG_EDGE);
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gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
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is_edge = true;
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break;
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case IRQ_TYPE_EDGE_RISING:
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- gic_set_polarity(irq, GIC_POL_POS);
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+ change_gic_pol(irq, GIC_POL_RISING_EDGE);
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gic_set_trigger(irq, GIC_TRIG_EDGE);
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gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
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is_edge = true;
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@@ -290,14 +283,14 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
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is_edge = true;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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- gic_set_polarity(irq, GIC_POL_NEG);
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+ change_gic_pol(irq, GIC_POL_ACTIVE_LOW);
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gic_set_trigger(irq, GIC_TRIG_LEVEL);
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gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
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is_edge = false;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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default:
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- gic_set_polarity(irq, GIC_POL_POS);
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+ change_gic_pol(irq, GIC_POL_ACTIVE_HIGH);
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gic_set_trigger(irq, GIC_TRIG_LEVEL);
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gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
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is_edge = false;
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@@ -464,7 +457,7 @@ static void __init gic_basic_init(void)
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/* Setup defaults */
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for (i = 0; i < gic_shared_intrs; i++) {
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- gic_set_polarity(i, GIC_POL_POS);
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+ change_gic_pol(i, GIC_POL_ACTIVE_HIGH);
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gic_set_trigger(i, GIC_TRIG_LEVEL);
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write_gic_rmask(BIT(i));
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}
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