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+/*
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+ * Copyright 2016 ZTE Corporation.
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+ * Copyright 2016 Linaro Ltd.
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This library is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This library is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ compatible = "zte,zx296718";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ interrupt-parent = <&gic>;
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+
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+ aliases {
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+ serial0 = &uart0;
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+ };
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+
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+ cpus {
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+ #address-cells = <2>;
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+ #size-cells = <0>;
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+
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+ cpu-map {
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+ cluster0 {
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+ core0 {
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+ cpu = <&cpu0>;
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+ };
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+ core1 {
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+ cpu = <&cpu1>;
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+ };
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+ core2 {
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+ cpu = <&cpu2>;
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+ };
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+ core3 {
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+ cpu = <&cpu3>;
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+ };
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+ };
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+ };
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+
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+ cpu0: cpu@0 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53","arm,armv8";
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+ reg = <0x0 0x0>;
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+ enable-method = "psci";
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+ };
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+
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+ cpu1: cpu@1 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53","arm,armv8";
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+ reg = <0x0 0x1>;
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+ enable-method = "psci";
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+ };
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+
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+ cpu2: cpu@2 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53","arm,armv8";
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+ reg = <0x0 0x2>;
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+ enable-method = "psci";
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+ };
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+
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+ cpu3: cpu@3 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a53","arm,armv8";
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+ reg = <0x0 0x3>;
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+ enable-method = "psci";
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+ };
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+ };
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+
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+ clk24k: clk-24k {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <24000>;
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+ clock-output-names = "rtcclk";
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+ };
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+
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+ osc32k: clk-osc32k {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <32000>;
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+ clock-output-names = "osc32k";
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+ };
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+
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+ osc12m: clk-osc12m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <12000000>;
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+ clock-output-names = "osc12m";
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+ };
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+
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+ osc24m: clk-osc24m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <24000000>;
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+ clock-output-names = "osc24m";
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+ };
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+
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+ osc25m: clk-osc25m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <25000000>;
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+ clock-output-names = "osc25m";
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+ };
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+
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+ osc60m: clk-osc60m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <60000000>;
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+ clock-output-names = "osc60m";
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+ };
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+
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+ osc99m: clk-osc99m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <99000000>;
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+ clock-output-names = "osc99m";
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+ };
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+
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+ osc125m: clk-osc125m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <125000000>;
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+ clock-output-names = "osc125m";
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+ };
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+
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+ osc198m: clk-osc198m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <198000000>;
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+ clock-output-names = "osc198m";
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+ };
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+
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+ pll_audio: clk-pll-884m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <884000000>;
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+ clock-output-names = "pll_audio";
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+ };
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+
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+ pll_ddr: clk-pll-932m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <932000000>;
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+ clock-output-names = "pll_ddr";
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+ };
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+
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+ pll_hsic: clk-pll-960m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <960000000>;
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+ clock-output-names = "pll_hsic";
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+ };
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+
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+ pll_mac: clk-pll-1000m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <1000000000>;
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+ clock-output-names = "pll_mac";
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+ };
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+
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+ pll_vga: clk-pll-1073m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <1073000000>;
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+ clock-output-names = "pll_vga";
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+ };
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+
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+ pll_mm0: clk-pll-1188m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <1188000000>;
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+ clock-output-names = "pll_mm0";
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+ };
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+
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+ pll_mm1: clk-pll-1296m {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <1296000000>;
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+ clock-output-names = "pll_mm1";
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+ };
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+
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+ psci {
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+ compatible = "arm,psci-1.0";
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+ method = "smc";
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+ };
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+
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+ timer {
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+ compatible = "arm,armv8-timer";
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+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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+ <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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+ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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+ <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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+ };
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+
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+ pmu {
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+ compatible = "arm,cortex-a53-pmu";
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+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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+ gic: interrupt-controller@2a00000 {
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+ compatible = "arm,gic-v3";
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+ #interrupt-cells = <3>;
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+ #address-cells = <0>;
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+ #redistributor-regions = <6>;
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+ redistributor-stride = <0x0 0x40000>;
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+ interrupt-controller;
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+ reg = <0x02a00000 0x10000>,
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+ <0x02b00000 0x20000>,
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+ <0x02b20000 0x20000>,
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+ <0x02b40000 0x20000>,
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+ <0x02b60000 0x20000>,
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+ <0x02b80000 0x20000>,
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+ <0x02ba0000 0x20000>;
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+ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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+ soc {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "simple-bus";
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+ ranges;
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+
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+ aon_sysctrl: aon-sysctrl@116000 {
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+ compatible = "zte,zx296718-aon-sysctrl", "syscon";
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+ reg = <0x116000 0x1000>;
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+ };
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+
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+ uart0: uart@11f000 {
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+ compatible = "arm,pl011", "arm,primecell";
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+ arm,primecell-periphid = <0x001feffe>;
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+ reg = <0x11f000 0x1000>;
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+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&osc24m>;
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+ clock-names = "apb_pclk";
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+ status = "disabled";
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+ };
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+
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+ dma: dma-controller@1460000 {
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+ compatible = "zte,zx296702-dma";
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+ reg = <0x01460000 0x1000>;
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+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&osc24m>;
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+ clock-names = "dmaclk";
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+ #dma-cells = <1>;
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+ dma-channels = <32>;
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+ dma-requests = <32>;
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+ };
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+
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+ sysctrl: sysctrl@1463000 {
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+ compatible = "zte,zx296718-sysctrl", "syscon";
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+ reg = <0x1463000 0x1000>;
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+ };
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+ };
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+};
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