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@@ -1,6 +1,9 @@
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/* Nehalem/SandBridge/Haswell uncore support */
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#include "perf_event_intel_uncore.h"
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+/* Uncore IMC PCI Id */
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+#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
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+
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/* SNB event control */
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#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
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#define SNB_UNC_CTL_UMASK_MASK 0x0000ff00
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@@ -472,6 +475,10 @@ static const struct pci_device_id hsw_uncore_pci_ids[] = {
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PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_IMC),
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.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
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},
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+ { /* IMC */
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+ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HSW_U_IMC),
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+ .driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
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+ },
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{ /* end: all zeroes */ },
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};
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@@ -502,6 +509,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
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IMC_DEV(IVB_IMC, &ivb_uncore_pci_driver), /* 3rd Gen Core processor */
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IMC_DEV(IVB_E3_IMC, &ivb_uncore_pci_driver), /* Xeon E3-1200 v2/3rd Gen Core processor */
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IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
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+ IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
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{ /* end marker */ }
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};
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