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@@ -156,14 +156,23 @@ static void pciedev_reg_pm_clk_period(struct bcma_drv_pcie2 *pcie2)
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void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2)
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{
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- struct bcma_chipinfo *ci = &pcie2->core->bus->chipinfo;
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+ struct bcma_bus *bus = pcie2->core->bus;
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+ struct bcma_chipinfo *ci = &bus->chipinfo;
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u32 tmp;
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tmp = pcie2_read32(pcie2, BCMA_CORE_PCIE2_SPROM(54));
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if ((tmp & 0xe) >> 1 == 2)
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bcma_core_pcie2_cfg_write(pcie2, 0x4e0, 0x17);
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- /* TODO: Do we need pcie_reqsize? */
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+ switch (bus->chipinfo.id) {
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+ case BCMA_CHIP_ID_BCM4360:
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+ case BCMA_CHIP_ID_BCM4352:
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+ pcie2->reqsize = 1024;
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+ break;
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+ default:
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+ pcie2->reqsize = 128;
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+ break;
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+ }
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if (ci->id == BCMA_CHIP_ID_BCM4360 && ci->rev > 3)
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bcma_core_pcie2_war_delay_perst_enab(pcie2, true);
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@@ -173,3 +182,18 @@ void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2)
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pciedev_crwlpciegen2_180(pcie2);
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pciedev_crwlpciegen2_182(pcie2);
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}
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+
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+/**************************************************
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+ * Runtime ops.
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+ **************************************************/
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+
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+void bcma_core_pcie2_up(struct bcma_drv_pcie2 *pcie2)
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+{
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+ struct bcma_bus *bus = pcie2->core->bus;
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+ struct pci_dev *dev = bus->host_pci;
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+ int err;
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+
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+ err = pcie_set_readrq(dev, pcie2->reqsize);
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+ if (err)
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+ bcma_err(bus, "Error setting PCI_EXP_DEVCTL_READRQ: %d\n", err);
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+}
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