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@@ -878,13 +878,13 @@ static void amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params *params,
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* allocation size to the fragment size.
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*/
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- const uint64_t frag_align = 1 << AMDGPU_LOG2_PAGES_PER_FRAG;
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+ /* SI and newer are optimized for 64KB */
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+ uint64_t frag_flags = AMDGPU_PTE_FRAG(AMDGPU_LOG2_PAGES_PER_FRAG);
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+ uint64_t frag_align = 1 << AMDGPU_LOG2_PAGES_PER_FRAG;
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uint64_t frag_start = ALIGN(start, frag_align);
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uint64_t frag_end = end & ~(frag_align - 1);
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- uint32_t frag;
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-
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/* system pages are non continuously */
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if (params->src || !(flags & AMDGPU_PTE_VALID) ||
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(frag_start >= frag_end)) {
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@@ -893,10 +893,6 @@ static void amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params *params,
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return;
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}
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- /* use more than 64KB fragment size if possible */
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- frag = lower_32_bits(frag_start | frag_end);
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- frag = likely(frag) ? __ffs(frag) : 31;
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-
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/* handle the 4K area at the beginning */
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if (start != frag_start) {
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amdgpu_vm_update_ptes(params, vm, start, frag_start,
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@@ -906,7 +902,7 @@ static void amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params *params,
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/* handle the area in the middle */
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amdgpu_vm_update_ptes(params, vm, frag_start, frag_end, dst,
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- flags | AMDGPU_PTE_FRAG(frag));
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+ flags | frag_flags);
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/* handle the 4K area at the end */
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if (frag_end != end) {
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