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@@ -21,7 +21,7 @@
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#define SYSTICK_LOAD_RELOAD_MASK 0x00FFFFFF
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#define SYSTICK_LOAD_RELOAD_MASK 0x00FFFFFF
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-static void __init system_timer_of_register(struct device_node *np)
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+static int __init system_timer_of_register(struct device_node *np)
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{
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{
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struct clk *clk = NULL;
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struct clk *clk = NULL;
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void __iomem *base;
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void __iomem *base;
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@@ -31,22 +31,26 @@ static void __init system_timer_of_register(struct device_node *np)
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base = of_iomap(np, 0);
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base = of_iomap(np, 0);
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if (!base) {
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if (!base) {
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pr_warn("system-timer: invalid base address\n");
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pr_warn("system-timer: invalid base address\n");
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- return;
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+ return -ENXIO;
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}
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}
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ret = of_property_read_u32(np, "clock-frequency", &rate);
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ret = of_property_read_u32(np, "clock-frequency", &rate);
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if (ret) {
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if (ret) {
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clk = of_clk_get(np, 0);
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clk = of_clk_get(np, 0);
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- if (IS_ERR(clk))
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+ if (IS_ERR(clk)) {
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+ ret = PTR_ERR(clk);
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goto out_unmap;
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goto out_unmap;
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+ }
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ret = clk_prepare_enable(clk);
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ret = clk_prepare_enable(clk);
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if (ret)
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if (ret)
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goto out_clk_put;
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goto out_clk_put;
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rate = clk_get_rate(clk);
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rate = clk_get_rate(clk);
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- if (!rate)
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+ if (!rate) {
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+ ret = -EINVAL;
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goto out_clk_disable;
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goto out_clk_disable;
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+ }
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}
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}
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writel_relaxed(SYSTICK_LOAD_RELOAD_MASK, base + SYST_RVR);
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writel_relaxed(SYSTICK_LOAD_RELOAD_MASK, base + SYST_RVR);
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@@ -64,7 +68,7 @@ static void __init system_timer_of_register(struct device_node *np)
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pr_info("ARM System timer initialized as clocksource\n");
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pr_info("ARM System timer initialized as clocksource\n");
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- return;
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+ return 0;
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out_clk_disable:
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out_clk_disable:
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clk_disable_unprepare(clk);
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clk_disable_unprepare(clk);
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@@ -73,7 +77,9 @@ out_clk_put:
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out_unmap:
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out_unmap:
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iounmap(base);
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iounmap(base);
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pr_warn("ARM System timer register failed (%d)\n", ret);
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pr_warn("ARM System timer register failed (%d)\n", ret);
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+
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+ return ret;
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}
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}
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-CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick",
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+CLOCKSOURCE_OF_DECLARE_RET(arm_systick, "arm,armv7m-systick",
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system_timer_of_register);
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system_timer_of_register);
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