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@@ -525,6 +525,91 @@ int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6])
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}
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EXPORT_SYMBOL(drm_dp_downstream_id);
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+/**
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+ * drm_dp_downstream_debug() - debug DP branch devices
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+ * @m: pointer for debugfs file
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+ * @dpcd: DisplayPort configuration data
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+ * @port_cap: port capabilities
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+ * @aux: DisplayPort AUX channel
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+ *
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+ */
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+void drm_dp_downstream_debug(struct seq_file *m,
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+ const u8 dpcd[DP_RECEIVER_CAP_SIZE],
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+ const u8 port_cap[4], struct drm_dp_aux *aux)
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+{
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+ bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
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+ DP_DETAILED_CAP_INFO_AVAILABLE;
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+ int clk;
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+ int bpc;
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+ char id[6];
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+ int len;
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+ uint8_t rev[2];
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+ int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
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+ bool branch_device = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
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+ DP_DWN_STRM_PORT_PRESENT;
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+
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+ seq_printf(m, "\tDP branch device present: %s\n",
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+ branch_device ? "yes" : "no");
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+
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+ if (!branch_device)
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+ return;
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+
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+ switch (type) {
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+ case DP_DS_PORT_TYPE_DP:
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+ seq_puts(m, "\t\tType: DisplayPort\n");
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+ break;
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+ case DP_DS_PORT_TYPE_VGA:
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+ seq_puts(m, "\t\tType: VGA\n");
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+ break;
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+ case DP_DS_PORT_TYPE_DVI:
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+ seq_puts(m, "\t\tType: DVI\n");
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+ break;
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+ case DP_DS_PORT_TYPE_HDMI:
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+ seq_puts(m, "\t\tType: HDMI\n");
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+ break;
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+ case DP_DS_PORT_TYPE_NON_EDID:
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+ seq_puts(m, "\t\tType: others without EDID support\n");
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+ break;
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+ case DP_DS_PORT_TYPE_DP_DUALMODE:
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+ seq_puts(m, "\t\tType: DP++\n");
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+ break;
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+ case DP_DS_PORT_TYPE_WIRELESS:
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+ seq_puts(m, "\t\tType: Wireless\n");
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+ break;
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+ default:
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+ seq_puts(m, "\t\tType: N/A\n");
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+ }
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+
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+ drm_dp_downstream_id(aux, id);
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+ seq_printf(m, "\t\tID: %s\n", id);
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+
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+ len = drm_dp_dpcd_read(aux, DP_BRANCH_HW_REV, &rev[0], 1);
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+ if (len > 0)
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+ seq_printf(m, "\t\tHW: %d.%d\n",
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+ (rev[0] & 0xf0) >> 4, rev[0] & 0xf);
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+
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+ len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, &rev, 2);
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+ if (len > 0)
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+ seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]);
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+
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+ if (detailed_cap_info) {
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+ clk = drm_dp_downstream_max_clock(dpcd, port_cap);
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+
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+ if (clk > 0) {
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+ if (type == DP_DS_PORT_TYPE_VGA)
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+ seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk);
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+ else
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+ seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk);
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+ }
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+
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+ bpc = drm_dp_downstream_max_bpc(dpcd, port_cap);
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+
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+ if (bpc > 0)
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+ seq_printf(m, "\t\tMax bpc: %d\n", bpc);
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+ }
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+}
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+EXPORT_SYMBOL(drm_dp_downstream_debug);
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+
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/*
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* I2C-over-AUX implementation
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*/
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