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@@ -1066,7 +1066,7 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
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*
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* CHV DPLL B/C have some issues if VGA mode is enabled.
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*/
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- for_each_pipe(&dev_priv->drm, pipe) {
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+ for_each_pipe(dev_priv, pipe) {
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u32 val = I915_READ(DPLL(pipe));
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val |= DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
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