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@@ -104,17 +104,12 @@ static void grgpio_set_imask(struct grgpio_priv *priv, unsigned int offset,
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{
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struct bgpio_chip *bgc = &priv->bgc;
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unsigned long mask = bgc->pin2mask(bgc, offset);
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- unsigned long flags;
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-
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- spin_lock_irqsave(&bgc->lock, flags);
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if (val)
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priv->imask |= mask;
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else
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priv->imask &= ~mask;
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bgc->write_reg(priv->regs + GRGPIO_IMASK, priv->imask);
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-
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- spin_unlock_irqrestore(&bgc->lock, flags);
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}
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static int grgpio_to_irq(struct gpio_chip *gc, unsigned offset)
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@@ -180,16 +175,26 @@ static void grgpio_irq_mask(struct irq_data *d)
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{
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struct grgpio_priv *priv = irq_data_get_irq_chip_data(d);
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int offset = d->hwirq;
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&priv->bgc.lock, flags);
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grgpio_set_imask(priv, offset, 0);
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+
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+ spin_unlock_irqrestore(&priv->bgc.lock, flags);
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}
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static void grgpio_irq_unmask(struct irq_data *d)
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{
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struct grgpio_priv *priv = irq_data_get_irq_chip_data(d);
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int offset = d->hwirq;
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&priv->bgc.lock, flags);
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grgpio_set_imask(priv, offset, 1);
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+
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+ spin_unlock_irqrestore(&priv->bgc.lock, flags);
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}
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static struct irq_chip grgpio_irq_chip = {
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