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@@ -25,7 +25,6 @@
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#define EXYNOS5420_CPUS_PER_CLUSTER 4
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#define EXYNOS5420_NR_CLUSTERS 2
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-#define MCPM_BOOT_ADDR_OFFSET 0x1c
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/*
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* The common v7_exit_coherency_flush API could not be used because of the
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@@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void)
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pr_info("Exynos MCPM support installed\n");
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/*
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- * Future entries into the kernel can now go
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- * through the cluster entry vectors.
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+ * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
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+ * as part of secondary_cpu_start(). Let's redirect it to the
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+ * mcpm_entry_point().
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*/
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- __raw_writel(virt_to_phys(mcpm_entry_point),
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- ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET);
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+ __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
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+ __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
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+ __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
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iounmap(ns_sram_base_addr);
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