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@@ -1039,9 +1039,8 @@ static int omap_dev_ready(struct mtd_info *mtd)
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}
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}
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-#if defined(CONFIG_MTD_NAND_ECC_BCH) || defined(CONFIG_MTD_NAND_OMAP_BCH)
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/**
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- * omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction
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+ * omap_enable_hwecc_bch - Program GPMC to perform BCH ECC calculation
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* @mtd: MTD device structure
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* @mode: Read/Write mode
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*
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@@ -1052,7 +1051,7 @@ static int omap_dev_ready(struct mtd_info *mtd)
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* eccsize0 = 0 (no additional protected byte in spare area)
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* eccsize1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
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*/
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-static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
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+static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode)
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{
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int nerrors;
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unsigned int dev_width, nsectors;
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@@ -1120,7 +1119,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
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/* Clear ecc and enable bits */
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writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
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}
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-#endif
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+
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static u8 bch4_polynomial[] = {0x28, 0x13, 0xcc, 0x39, 0x96, 0xac, 0x7f};
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static u8 bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2,
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0x97, 0x79, 0xe5, 0x24, 0xb5};
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@@ -1763,7 +1762,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->ecc.size = 512;
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nand_chip->ecc.bytes = 7;
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nand_chip->ecc.strength = 4;
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- nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
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+ nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
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nand_chip->ecc.correct = nand_bch_correct_data;
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nand_chip->ecc.calculate = omap_calculate_ecc_bch;
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/* define ECC layout */
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@@ -1803,7 +1802,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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/* 14th bit is kept reserved for ROM-code compatibility */
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nand_chip->ecc.bytes = 7 + 1;
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nand_chip->ecc.strength = 4;
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- nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
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+ nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
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nand_chip->ecc.correct = omap_elm_correct_data;
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nand_chip->ecc.calculate = omap_calculate_ecc_bch;
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nand_chip->ecc.read_page = omap_read_page_bch;
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@@ -1838,7 +1837,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->ecc.size = 512;
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nand_chip->ecc.bytes = 13;
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nand_chip->ecc.strength = 8;
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- nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
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+ nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
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nand_chip->ecc.correct = nand_bch_correct_data;
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nand_chip->ecc.calculate = omap_calculate_ecc_bch;
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/* define ECC layout */
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@@ -1879,7 +1878,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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/* 14th bit is kept reserved for ROM-code compatibility */
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nand_chip->ecc.bytes = 13 + 1;
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nand_chip->ecc.strength = 8;
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- nand_chip->ecc.hwctl = omap3_enable_hwecc_bch;
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+ nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
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nand_chip->ecc.correct = omap_elm_correct_data;
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nand_chip->ecc.calculate = omap_calculate_ecc_bch;
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nand_chip->ecc.read_page = omap_read_page_bch;
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