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@@ -80,4 +80,11 @@
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#define MT2701_HIFSYS_PCIE1_RST 25
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#define MT2701_HIFSYS_PCIE1_RST 25
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#define MT2701_HIFSYS_PCIE2_RST 26
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#define MT2701_HIFSYS_PCIE2_RST 26
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+/* ETHSYS resets */
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+#define MT2701_ETHSYS_SYS_RST 0
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+#define MT2701_ETHSYS_MCM_RST 2
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+#define MT2701_ETHSYS_FE_RST 6
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+#define MT2701_ETHSYS_GMAC_RST 23
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+#define MT2701_ETHSYS_PPE_RST 31
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+
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2701 */
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#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT2701 */
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