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@@ -3165,9 +3165,7 @@ static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
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usleep_range(1000, 2000);
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}
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/* Skip if the queue is already in the requested state */
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- if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
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- continue;
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- if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
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+ if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
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continue;
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/* turn on/off the queue */
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@@ -3183,13 +3181,8 @@ static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
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/* wait for the change to finish */
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for (j = 0; j < 10; j++) {
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tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
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- if (enable) {
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- if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
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- break;
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- } else {
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- if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
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- break;
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- }
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+ if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
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+ break;
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udelay(10);
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}
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@@ -3228,15 +3221,9 @@ static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
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usleep_range(1000, 2000);
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}
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- if (enable) {
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- /* is STAT set ? */
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- if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
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- continue;
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- } else {
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- /* is !STAT set ? */
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- if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
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- continue;
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- }
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+ /* Skip if the queue is already in the requested state */
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+ if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
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+ continue;
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/* turn on/off the queue */
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if (enable)
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@@ -3249,13 +3236,8 @@ static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
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for (j = 0; j < 10; j++) {
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rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
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- if (enable) {
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- if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
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- break;
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- } else {
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- if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
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- break;
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- }
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+ if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
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+ break;
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udelay(10);
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}
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