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@@ -0,0 +1,801 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/* Copyright(c) 2018 Intel Corporation. */
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+
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+#include <linux/bpf_trace.h>
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+#include <net/xdp_sock.h>
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+#include <net/xdp.h>
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+
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+#include "ixgbe.h"
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+#include "ixgbe_txrx_common.h"
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+
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+struct xdp_umem *ixgbe_xsk_umem(struct ixgbe_adapter *adapter,
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+ struct ixgbe_ring *ring)
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+{
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+ bool xdp_on = READ_ONCE(adapter->xdp_prog);
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+ int qid = ring->ring_idx;
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+
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+ if (!adapter->xsk_umems || !adapter->xsk_umems[qid] ||
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+ qid >= adapter->num_xsk_umems || !xdp_on)
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+ return NULL;
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+
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+ return adapter->xsk_umems[qid];
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+}
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+
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+static int ixgbe_alloc_xsk_umems(struct ixgbe_adapter *adapter)
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+{
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+ if (adapter->xsk_umems)
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+ return 0;
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+
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+ adapter->num_xsk_umems_used = 0;
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+ adapter->num_xsk_umems = adapter->num_rx_queues;
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+ adapter->xsk_umems = kcalloc(adapter->num_xsk_umems,
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+ sizeof(*adapter->xsk_umems),
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+ GFP_KERNEL);
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+ if (!adapter->xsk_umems) {
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+ adapter->num_xsk_umems = 0;
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+ return -ENOMEM;
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+ }
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+
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+ return 0;
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+}
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+
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+static int ixgbe_add_xsk_umem(struct ixgbe_adapter *adapter,
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+ struct xdp_umem *umem,
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+ u16 qid)
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+{
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+ int err;
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+
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+ err = ixgbe_alloc_xsk_umems(adapter);
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+ if (err)
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+ return err;
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+
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+ adapter->xsk_umems[qid] = umem;
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+ adapter->num_xsk_umems_used++;
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+
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+ return 0;
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+}
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+
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+static void ixgbe_remove_xsk_umem(struct ixgbe_adapter *adapter, u16 qid)
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+{
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+ adapter->xsk_umems[qid] = NULL;
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+ adapter->num_xsk_umems_used--;
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+
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+ if (adapter->num_xsk_umems == 0) {
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+ kfree(adapter->xsk_umems);
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+ adapter->xsk_umems = NULL;
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+ adapter->num_xsk_umems = 0;
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+ }
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+}
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+
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+static int ixgbe_xsk_umem_dma_map(struct ixgbe_adapter *adapter,
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+ struct xdp_umem *umem)
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+{
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+ struct device *dev = &adapter->pdev->dev;
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+ unsigned int i, j;
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+ dma_addr_t dma;
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+
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+ for (i = 0; i < umem->npgs; i++) {
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+ dma = dma_map_page_attrs(dev, umem->pgs[i], 0, PAGE_SIZE,
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+ DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR);
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+ if (dma_mapping_error(dev, dma))
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+ goto out_unmap;
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+
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+ umem->pages[i].dma = dma;
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+ }
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+
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+ return 0;
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+
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+out_unmap:
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+ for (j = 0; j < i; j++) {
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+ dma_unmap_page_attrs(dev, umem->pages[i].dma, PAGE_SIZE,
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+ DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR);
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+ umem->pages[i].dma = 0;
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+ }
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+
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+ return -1;
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+}
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+
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+static void ixgbe_xsk_umem_dma_unmap(struct ixgbe_adapter *adapter,
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+ struct xdp_umem *umem)
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+{
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+ struct device *dev = &adapter->pdev->dev;
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+ unsigned int i;
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+
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+ for (i = 0; i < umem->npgs; i++) {
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+ dma_unmap_page_attrs(dev, umem->pages[i].dma, PAGE_SIZE,
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+ DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR);
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+
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+ umem->pages[i].dma = 0;
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+ }
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+}
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+
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+static int ixgbe_xsk_umem_enable(struct ixgbe_adapter *adapter,
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+ struct xdp_umem *umem,
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+ u16 qid)
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+{
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+ struct xdp_umem_fq_reuse *reuseq;
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+ bool if_running;
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+ int err;
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+
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+ if (qid >= adapter->num_rx_queues)
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+ return -EINVAL;
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+
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+ if (adapter->xsk_umems) {
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+ if (qid >= adapter->num_xsk_umems)
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+ return -EINVAL;
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+ if (adapter->xsk_umems[qid])
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+ return -EBUSY;
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+ }
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+
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+ reuseq = xsk_reuseq_prepare(adapter->rx_ring[0]->count);
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+ if (!reuseq)
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+ return -ENOMEM;
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+
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+ xsk_reuseq_free(xsk_reuseq_swap(umem, reuseq));
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+
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+ err = ixgbe_xsk_umem_dma_map(adapter, umem);
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+ if (err)
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+ return err;
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+
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+ if_running = netif_running(adapter->netdev) &&
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+ READ_ONCE(adapter->xdp_prog);
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+
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+ if (if_running)
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+ ixgbe_txrx_ring_disable(adapter, qid);
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+
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+ err = ixgbe_add_xsk_umem(adapter, umem, qid);
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+
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+ if (if_running)
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+ ixgbe_txrx_ring_enable(adapter, qid);
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+
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+ return err;
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+}
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+
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+static int ixgbe_xsk_umem_disable(struct ixgbe_adapter *adapter, u16 qid)
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+{
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+ bool if_running;
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+
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+ if (!adapter->xsk_umems || qid >= adapter->num_xsk_umems ||
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+ !adapter->xsk_umems[qid])
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+ return -EINVAL;
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+
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+ if_running = netif_running(adapter->netdev) &&
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+ READ_ONCE(adapter->xdp_prog);
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+
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+ if (if_running)
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+ ixgbe_txrx_ring_disable(adapter, qid);
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+
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+ ixgbe_xsk_umem_dma_unmap(adapter, adapter->xsk_umems[qid]);
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+ ixgbe_remove_xsk_umem(adapter, qid);
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+
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+ if (if_running)
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+ ixgbe_txrx_ring_enable(adapter, qid);
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+
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+ return 0;
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+}
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+
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+int ixgbe_xsk_umem_query(struct ixgbe_adapter *adapter, struct xdp_umem **umem,
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+ u16 qid)
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+{
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+ if (qid >= adapter->num_rx_queues)
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+ return -EINVAL;
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+
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+ if (adapter->xsk_umems) {
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+ if (qid >= adapter->num_xsk_umems)
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+ return -EINVAL;
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+ *umem = adapter->xsk_umems[qid];
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+ return 0;
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+ }
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+
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+ *umem = NULL;
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+ return 0;
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+}
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+
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+int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xdp_umem *umem,
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+ u16 qid)
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+{
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+ return umem ? ixgbe_xsk_umem_enable(adapter, umem, qid) :
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+ ixgbe_xsk_umem_disable(adapter, qid);
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+}
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+
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+static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
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+ struct ixgbe_ring *rx_ring,
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+ struct xdp_buff *xdp)
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+{
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+ int err, result = IXGBE_XDP_PASS;
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+ struct bpf_prog *xdp_prog;
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+ struct xdp_frame *xdpf;
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+ u32 act;
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+
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+ rcu_read_lock();
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+ xdp_prog = READ_ONCE(rx_ring->xdp_prog);
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+ act = bpf_prog_run_xdp(xdp_prog, xdp);
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+ xdp->handle += xdp->data - xdp->data_hard_start;
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+ switch (act) {
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+ case XDP_PASS:
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+ break;
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+ case XDP_TX:
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+ xdpf = convert_to_xdp_frame(xdp);
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+ if (unlikely(!xdpf)) {
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+ result = IXGBE_XDP_CONSUMED;
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+ break;
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+ }
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+ result = ixgbe_xmit_xdp_ring(adapter, xdpf);
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+ break;
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+ case XDP_REDIRECT:
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+ err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
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+ result = !err ? IXGBE_XDP_REDIR : IXGBE_XDP_CONSUMED;
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+ break;
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+ default:
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+ bpf_warn_invalid_xdp_action(act);
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+ /* fallthrough */
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+ case XDP_ABORTED:
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+ trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
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+ /* fallthrough -- handle aborts by dropping packet */
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+ case XDP_DROP:
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+ result = IXGBE_XDP_CONSUMED;
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+ break;
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+ }
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+ rcu_read_unlock();
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+ return result;
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+}
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+
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+static struct
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+ixgbe_rx_buffer *ixgbe_get_rx_buffer_zc(struct ixgbe_ring *rx_ring,
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+ unsigned int size)
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+{
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+ struct ixgbe_rx_buffer *bi;
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+
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+ bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
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+
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+ /* we are reusing so sync this buffer for CPU use */
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+ dma_sync_single_range_for_cpu(rx_ring->dev,
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+ bi->dma, 0,
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+ size,
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+ DMA_BIDIRECTIONAL);
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+
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+ return bi;
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+}
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+
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+static void ixgbe_reuse_rx_buffer_zc(struct ixgbe_ring *rx_ring,
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+ struct ixgbe_rx_buffer *obi)
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+{
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+ unsigned long mask = (unsigned long)rx_ring->xsk_umem->chunk_mask;
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+ u64 hr = rx_ring->xsk_umem->headroom + XDP_PACKET_HEADROOM;
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+ u16 nta = rx_ring->next_to_alloc;
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+ struct ixgbe_rx_buffer *nbi;
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+
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+ nbi = &rx_ring->rx_buffer_info[rx_ring->next_to_alloc];
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+ /* update, and store next to alloc */
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+ nta++;
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+ rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
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+
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+ /* transfer page from old buffer to new buffer */
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+ nbi->dma = obi->dma & mask;
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+ nbi->dma += hr;
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+
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+ nbi->addr = (void *)((unsigned long)obi->addr & mask);
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+ nbi->addr += hr;
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+
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+ nbi->handle = obi->handle & mask;
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+ nbi->handle += rx_ring->xsk_umem->headroom;
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+
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+ obi->addr = NULL;
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+ obi->skb = NULL;
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+}
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+
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+void ixgbe_zca_free(struct zero_copy_allocator *alloc, unsigned long handle)
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+{
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+ struct ixgbe_rx_buffer *bi;
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+ struct ixgbe_ring *rx_ring;
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+ u64 hr, mask;
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+ u16 nta;
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+
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+ rx_ring = container_of(alloc, struct ixgbe_ring, zca);
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+ hr = rx_ring->xsk_umem->headroom + XDP_PACKET_HEADROOM;
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+ mask = rx_ring->xsk_umem->chunk_mask;
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+
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+ nta = rx_ring->next_to_alloc;
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+ bi = rx_ring->rx_buffer_info;
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+
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+ nta++;
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+ rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
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+
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+ handle &= mask;
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+
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+ bi->dma = xdp_umem_get_dma(rx_ring->xsk_umem, handle);
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+ bi->dma += hr;
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+
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+ bi->addr = xdp_umem_get_data(rx_ring->xsk_umem, handle);
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+ bi->addr += hr;
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+
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+ bi->handle = (u64)handle + rx_ring->xsk_umem->headroom;
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+}
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+
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+static bool ixgbe_alloc_buffer_zc(struct ixgbe_ring *rx_ring,
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+ struct ixgbe_rx_buffer *bi)
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+{
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+ struct xdp_umem *umem = rx_ring->xsk_umem;
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+ void *addr = bi->addr;
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+ u64 handle, hr;
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+
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+ if (addr)
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+ return true;
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+
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+ if (!xsk_umem_peek_addr(umem, &handle)) {
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+ rx_ring->rx_stats.alloc_rx_page_failed++;
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+ return false;
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+ }
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+
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+ hr = umem->headroom + XDP_PACKET_HEADROOM;
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+
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+ bi->dma = xdp_umem_get_dma(umem, handle);
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+ bi->dma += hr;
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+
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+ bi->addr = xdp_umem_get_data(umem, handle);
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+ bi->addr += hr;
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+
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+ bi->handle = handle + umem->headroom;
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+
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+ xsk_umem_discard_addr(umem);
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+ return true;
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+}
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+
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+static bool ixgbe_alloc_buffer_slow_zc(struct ixgbe_ring *rx_ring,
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+ struct ixgbe_rx_buffer *bi)
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+{
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+ struct xdp_umem *umem = rx_ring->xsk_umem;
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+ u64 handle, hr;
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+
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+ if (!xsk_umem_peek_addr_rq(umem, &handle)) {
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+ rx_ring->rx_stats.alloc_rx_page_failed++;
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+ return false;
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+ }
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+
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+ handle &= rx_ring->xsk_umem->chunk_mask;
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+
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+ hr = umem->headroom + XDP_PACKET_HEADROOM;
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+
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+ bi->dma = xdp_umem_get_dma(umem, handle);
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+ bi->dma += hr;
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+
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+ bi->addr = xdp_umem_get_data(umem, handle);
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+ bi->addr += hr;
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+
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+ bi->handle = handle + umem->headroom;
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+
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+ xsk_umem_discard_addr_rq(umem);
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+ return true;
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+}
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+
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+static __always_inline bool
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+__ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 cleaned_count,
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+ bool alloc(struct ixgbe_ring *rx_ring,
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+ struct ixgbe_rx_buffer *bi))
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+{
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+ union ixgbe_adv_rx_desc *rx_desc;
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+ struct ixgbe_rx_buffer *bi;
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+ u16 i = rx_ring->next_to_use;
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+ bool ok = true;
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+
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+ /* nothing to do */
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+ if (!cleaned_count)
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+ return true;
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+
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+ rx_desc = IXGBE_RX_DESC(rx_ring, i);
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+ bi = &rx_ring->rx_buffer_info[i];
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+ i -= rx_ring->count;
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+
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+ do {
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+ if (!alloc(rx_ring, bi)) {
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+ ok = false;
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+ break;
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+ }
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+
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+ /* sync the buffer for use by the device */
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+ dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
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+ bi->page_offset,
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+ rx_ring->rx_buf_len,
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+ DMA_BIDIRECTIONAL);
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+
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+ /* Refresh the desc even if buffer_addrs didn't change
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+ * because each write-back erases this info.
|
|
|
+ */
|
|
|
+ rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
|
|
|
+
|
|
|
+ rx_desc++;
|
|
|
+ bi++;
|
|
|
+ i++;
|
|
|
+ if (unlikely(!i)) {
|
|
|
+ rx_desc = IXGBE_RX_DESC(rx_ring, 0);
|
|
|
+ bi = rx_ring->rx_buffer_info;
|
|
|
+ i -= rx_ring->count;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* clear the length for the next_to_use descriptor */
|
|
|
+ rx_desc->wb.upper.length = 0;
|
|
|
+
|
|
|
+ cleaned_count--;
|
|
|
+ } while (cleaned_count);
|
|
|
+
|
|
|
+ i += rx_ring->count;
|
|
|
+
|
|
|
+ if (rx_ring->next_to_use != i) {
|
|
|
+ rx_ring->next_to_use = i;
|
|
|
+
|
|
|
+ /* update next to alloc since we have filled the ring */
|
|
|
+ rx_ring->next_to_alloc = i;
|
|
|
+
|
|
|
+ /* Force memory writes to complete before letting h/w
|
|
|
+ * know there are new descriptors to fetch. (Only
|
|
|
+ * applicable for weak-ordered memory model archs,
|
|
|
+ * such as IA-64).
|
|
|
+ */
|
|
|
+ wmb();
|
|
|
+ writel(i, rx_ring->tail);
|
|
|
+ }
|
|
|
+
|
|
|
+ return ok;
|
|
|
+}
|
|
|
+
|
|
|
+void ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
|
|
|
+{
|
|
|
+ __ixgbe_alloc_rx_buffers_zc(rx_ring, count,
|
|
|
+ ixgbe_alloc_buffer_slow_zc);
|
|
|
+}
|
|
|
+
|
|
|
+static bool ixgbe_alloc_rx_buffers_fast_zc(struct ixgbe_ring *rx_ring,
|
|
|
+ u16 count)
|
|
|
+{
|
|
|
+ return __ixgbe_alloc_rx_buffers_zc(rx_ring, count,
|
|
|
+ ixgbe_alloc_buffer_zc);
|
|
|
+}
|
|
|
+
|
|
|
+static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
|
|
|
+ struct ixgbe_rx_buffer *bi,
|
|
|
+ struct xdp_buff *xdp)
|
|
|
+{
|
|
|
+ unsigned int metasize = xdp->data - xdp->data_meta;
|
|
|
+ unsigned int datasize = xdp->data_end - xdp->data;
|
|
|
+ struct sk_buff *skb;
|
|
|
+
|
|
|
+ /* allocate a skb to store the frags */
|
|
|
+ skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
|
|
|
+ xdp->data_end - xdp->data_hard_start,
|
|
|
+ GFP_ATOMIC | __GFP_NOWARN);
|
|
|
+ if (unlikely(!skb))
|
|
|
+ return NULL;
|
|
|
+
|
|
|
+ skb_reserve(skb, xdp->data - xdp->data_hard_start);
|
|
|
+ memcpy(__skb_put(skb, datasize), xdp->data, datasize);
|
|
|
+ if (metasize)
|
|
|
+ skb_metadata_set(skb, metasize);
|
|
|
+
|
|
|
+ ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
|
|
|
+ return skb;
|
|
|
+}
|
|
|
+
|
|
|
+static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
|
|
|
+{
|
|
|
+ u32 ntc = rx_ring->next_to_clean + 1;
|
|
|
+
|
|
|
+ ntc = (ntc < rx_ring->count) ? ntc : 0;
|
|
|
+ rx_ring->next_to_clean = ntc;
|
|
|
+ prefetch(IXGBE_RX_DESC(rx_ring, ntc));
|
|
|
+}
|
|
|
+
|
|
|
+int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
|
|
|
+ struct ixgbe_ring *rx_ring,
|
|
|
+ const int budget)
|
|
|
+{
|
|
|
+ unsigned int total_rx_bytes = 0, total_rx_packets = 0;
|
|
|
+ struct ixgbe_adapter *adapter = q_vector->adapter;
|
|
|
+ u16 cleaned_count = ixgbe_desc_unused(rx_ring);
|
|
|
+ unsigned int xdp_res, xdp_xmit = 0;
|
|
|
+ bool failure = false;
|
|
|
+ struct sk_buff *skb;
|
|
|
+ struct xdp_buff xdp;
|
|
|
+
|
|
|
+ xdp.rxq = &rx_ring->xdp_rxq;
|
|
|
+
|
|
|
+ while (likely(total_rx_packets < budget)) {
|
|
|
+ union ixgbe_adv_rx_desc *rx_desc;
|
|
|
+ struct ixgbe_rx_buffer *bi;
|
|
|
+ unsigned int size;
|
|
|
+
|
|
|
+ /* return some buffers to hardware, one at a time is too slow */
|
|
|
+ if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
|
|
|
+ failure = failure ||
|
|
|
+ !ixgbe_alloc_rx_buffers_fast_zc(rx_ring,
|
|
|
+ cleaned_count);
|
|
|
+ cleaned_count = 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
|
|
|
+ size = le16_to_cpu(rx_desc->wb.upper.length);
|
|
|
+ if (!size)
|
|
|
+ break;
|
|
|
+
|
|
|
+ /* This memory barrier is needed to keep us from reading
|
|
|
+ * any other fields out of the rx_desc until we know the
|
|
|
+ * descriptor has been written back
|
|
|
+ */
|
|
|
+ dma_rmb();
|
|
|
+
|
|
|
+ bi = ixgbe_get_rx_buffer_zc(rx_ring, size);
|
|
|
+
|
|
|
+ if (unlikely(!ixgbe_test_staterr(rx_desc,
|
|
|
+ IXGBE_RXD_STAT_EOP))) {
|
|
|
+ struct ixgbe_rx_buffer *next_bi;
|
|
|
+
|
|
|
+ ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
|
|
|
+ ixgbe_inc_ntc(rx_ring);
|
|
|
+ next_bi =
|
|
|
+ &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
|
|
|
+ next_bi->skb = ERR_PTR(-EINVAL);
|
|
|
+ continue;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (unlikely(bi->skb)) {
|
|
|
+ ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
|
|
|
+ ixgbe_inc_ntc(rx_ring);
|
|
|
+ continue;
|
|
|
+ }
|
|
|
+
|
|
|
+ xdp.data = bi->addr;
|
|
|
+ xdp.data_meta = xdp.data;
|
|
|
+ xdp.data_hard_start = xdp.data - XDP_PACKET_HEADROOM;
|
|
|
+ xdp.data_end = xdp.data + size;
|
|
|
+ xdp.handle = bi->handle;
|
|
|
+
|
|
|
+ xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, &xdp);
|
|
|
+
|
|
|
+ if (xdp_res) {
|
|
|
+ if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
|
|
|
+ xdp_xmit |= xdp_res;
|
|
|
+ bi->addr = NULL;
|
|
|
+ bi->skb = NULL;
|
|
|
+ } else {
|
|
|
+ ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
|
|
|
+ }
|
|
|
+ total_rx_packets++;
|
|
|
+ total_rx_bytes += size;
|
|
|
+
|
|
|
+ cleaned_count++;
|
|
|
+ ixgbe_inc_ntc(rx_ring);
|
|
|
+ continue;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* XDP_PASS path */
|
|
|
+ skb = ixgbe_construct_skb_zc(rx_ring, bi, &xdp);
|
|
|
+ if (!skb) {
|
|
|
+ rx_ring->rx_stats.alloc_rx_buff_failed++;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ cleaned_count++;
|
|
|
+ ixgbe_inc_ntc(rx_ring);
|
|
|
+
|
|
|
+ if (eth_skb_pad(skb))
|
|
|
+ continue;
|
|
|
+
|
|
|
+ total_rx_bytes += skb->len;
|
|
|
+ total_rx_packets++;
|
|
|
+
|
|
|
+ ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
|
|
|
+ ixgbe_rx_skb(q_vector, skb);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (xdp_xmit & IXGBE_XDP_REDIR)
|
|
|
+ xdp_do_flush_map();
|
|
|
+
|
|
|
+ if (xdp_xmit & IXGBE_XDP_TX) {
|
|
|
+ struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
|
|
|
+
|
|
|
+ /* Force memory writes to complete before letting h/w
|
|
|
+ * know there are new descriptors to fetch.
|
|
|
+ */
|
|
|
+ wmb();
|
|
|
+ writel(ring->next_to_use, ring->tail);
|
|
|
+ }
|
|
|
+
|
|
|
+ u64_stats_update_begin(&rx_ring->syncp);
|
|
|
+ rx_ring->stats.packets += total_rx_packets;
|
|
|
+ rx_ring->stats.bytes += total_rx_bytes;
|
|
|
+ u64_stats_update_end(&rx_ring->syncp);
|
|
|
+ q_vector->rx.total_packets += total_rx_packets;
|
|
|
+ q_vector->rx.total_bytes += total_rx_bytes;
|
|
|
+
|
|
|
+ return failure ? budget : (int)total_rx_packets;
|
|
|
+}
|
|
|
+
|
|
|
+void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
|
|
|
+{
|
|
|
+ u16 i = rx_ring->next_to_clean;
|
|
|
+ struct ixgbe_rx_buffer *bi = &rx_ring->rx_buffer_info[i];
|
|
|
+
|
|
|
+ while (i != rx_ring->next_to_alloc) {
|
|
|
+ xsk_umem_fq_reuse(rx_ring->xsk_umem, bi->handle);
|
|
|
+ i++;
|
|
|
+ bi++;
|
|
|
+ if (i == rx_ring->count) {
|
|
|
+ i = 0;
|
|
|
+ bi = rx_ring->rx_buffer_info;
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
|
|
|
+{
|
|
|
+ union ixgbe_adv_tx_desc *tx_desc = NULL;
|
|
|
+ struct ixgbe_tx_buffer *tx_bi;
|
|
|
+ bool work_done = true;
|
|
|
+ u32 len, cmd_type;
|
|
|
+ dma_addr_t dma;
|
|
|
+
|
|
|
+ while (budget-- > 0) {
|
|
|
+ if (unlikely(!ixgbe_desc_unused(xdp_ring))) {
|
|
|
+ work_done = false;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!xsk_umem_consume_tx(xdp_ring->xsk_umem, &dma, &len))
|
|
|
+ break;
|
|
|
+
|
|
|
+ dma_sync_single_for_device(xdp_ring->dev, dma, len,
|
|
|
+ DMA_BIDIRECTIONAL);
|
|
|
+
|
|
|
+ tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
|
|
|
+ tx_bi->bytecount = len;
|
|
|
+ tx_bi->xdpf = NULL;
|
|
|
+
|
|
|
+ tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
|
|
|
+ tx_desc->read.buffer_addr = cpu_to_le64(dma);
|
|
|
+
|
|
|
+ /* put descriptor type bits */
|
|
|
+ cmd_type = IXGBE_ADVTXD_DTYP_DATA |
|
|
|
+ IXGBE_ADVTXD_DCMD_DEXT |
|
|
|
+ IXGBE_ADVTXD_DCMD_IFCS;
|
|
|
+ cmd_type |= len | IXGBE_TXD_CMD;
|
|
|
+ tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
|
|
|
+ tx_desc->read.olinfo_status =
|
|
|
+ cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
|
|
|
+
|
|
|
+ xdp_ring->next_to_use++;
|
|
|
+ if (xdp_ring->next_to_use == xdp_ring->count)
|
|
|
+ xdp_ring->next_to_use = 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (tx_desc) {
|
|
|
+ ixgbe_xdp_ring_update_tail(xdp_ring);
|
|
|
+ xsk_umem_consume_tx_done(xdp_ring->xsk_umem);
|
|
|
+ }
|
|
|
+
|
|
|
+ return !!budget && work_done;
|
|
|
+}
|
|
|
+
|
|
|
+static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
|
|
|
+ struct ixgbe_tx_buffer *tx_bi)
|
|
|
+{
|
|
|
+ xdp_return_frame(tx_bi->xdpf);
|
|
|
+ dma_unmap_single(tx_ring->dev,
|
|
|
+ dma_unmap_addr(tx_bi, dma),
|
|
|
+ dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
|
|
|
+ dma_unmap_len_set(tx_bi, len, 0);
|
|
|
+}
|
|
|
+
|
|
|
+bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
|
|
|
+ struct ixgbe_ring *tx_ring, int napi_budget)
|
|
|
+{
|
|
|
+ unsigned int total_packets = 0, total_bytes = 0;
|
|
|
+ u32 i = tx_ring->next_to_clean, xsk_frames = 0;
|
|
|
+ unsigned int budget = q_vector->tx.work_limit;
|
|
|
+ struct xdp_umem *umem = tx_ring->xsk_umem;
|
|
|
+ union ixgbe_adv_tx_desc *tx_desc;
|
|
|
+ struct ixgbe_tx_buffer *tx_bi;
|
|
|
+ bool xmit_done;
|
|
|
+
|
|
|
+ tx_bi = &tx_ring->tx_buffer_info[i];
|
|
|
+ tx_desc = IXGBE_TX_DESC(tx_ring, i);
|
|
|
+ i -= tx_ring->count;
|
|
|
+
|
|
|
+ do {
|
|
|
+ if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
|
|
|
+ break;
|
|
|
+
|
|
|
+ total_bytes += tx_bi->bytecount;
|
|
|
+ total_packets += tx_bi->gso_segs;
|
|
|
+
|
|
|
+ if (tx_bi->xdpf)
|
|
|
+ ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
|
|
|
+ else
|
|
|
+ xsk_frames++;
|
|
|
+
|
|
|
+ tx_bi->xdpf = NULL;
|
|
|
+ total_bytes += tx_bi->bytecount;
|
|
|
+
|
|
|
+ tx_bi++;
|
|
|
+ tx_desc++;
|
|
|
+ i++;
|
|
|
+ if (unlikely(!i)) {
|
|
|
+ i -= tx_ring->count;
|
|
|
+ tx_bi = tx_ring->tx_buffer_info;
|
|
|
+ tx_desc = IXGBE_TX_DESC(tx_ring, 0);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* issue prefetch for next Tx descriptor */
|
|
|
+ prefetch(tx_desc);
|
|
|
+
|
|
|
+ /* update budget accounting */
|
|
|
+ budget--;
|
|
|
+ } while (likely(budget));
|
|
|
+
|
|
|
+ i += tx_ring->count;
|
|
|
+ tx_ring->next_to_clean = i;
|
|
|
+
|
|
|
+ u64_stats_update_begin(&tx_ring->syncp);
|
|
|
+ tx_ring->stats.bytes += total_bytes;
|
|
|
+ tx_ring->stats.packets += total_packets;
|
|
|
+ u64_stats_update_end(&tx_ring->syncp);
|
|
|
+ q_vector->tx.total_bytes += total_bytes;
|
|
|
+ q_vector->tx.total_packets += total_packets;
|
|
|
+
|
|
|
+ if (xsk_frames)
|
|
|
+ xsk_umem_complete_tx(umem, xsk_frames);
|
|
|
+
|
|
|
+ xmit_done = ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
|
|
|
+ return budget > 0 && xmit_done;
|
|
|
+}
|
|
|
+
|
|
|
+int ixgbe_xsk_async_xmit(struct net_device *dev, u32 qid)
|
|
|
+{
|
|
|
+ struct ixgbe_adapter *adapter = netdev_priv(dev);
|
|
|
+ struct ixgbe_ring *ring;
|
|
|
+
|
|
|
+ if (test_bit(__IXGBE_DOWN, &adapter->state))
|
|
|
+ return -ENETDOWN;
|
|
|
+
|
|
|
+ if (!READ_ONCE(adapter->xdp_prog))
|
|
|
+ return -ENXIO;
|
|
|
+
|
|
|
+ if (qid >= adapter->num_xdp_queues)
|
|
|
+ return -ENXIO;
|
|
|
+
|
|
|
+ if (!adapter->xsk_umems || !adapter->xsk_umems[qid])
|
|
|
+ return -ENXIO;
|
|
|
+
|
|
|
+ ring = adapter->xdp_ring[qid];
|
|
|
+ if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
|
|
|
+ u64 eics = BIT_ULL(ring->q_vector->v_idx);
|
|
|
+
|
|
|
+ ixgbe_irq_rearm_queues(adapter, eics);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
|
|
|
+{
|
|
|
+ u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
|
|
|
+ struct xdp_umem *umem = tx_ring->xsk_umem;
|
|
|
+ struct ixgbe_tx_buffer *tx_bi;
|
|
|
+ u32 xsk_frames = 0;
|
|
|
+
|
|
|
+ while (ntc != ntu) {
|
|
|
+ tx_bi = &tx_ring->tx_buffer_info[ntc];
|
|
|
+
|
|
|
+ if (tx_bi->xdpf)
|
|
|
+ ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
|
|
|
+ else
|
|
|
+ xsk_frames++;
|
|
|
+
|
|
|
+ tx_bi->xdpf = NULL;
|
|
|
+
|
|
|
+ ntc++;
|
|
|
+ if (ntc == tx_ring->count)
|
|
|
+ ntc = 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (xsk_frames)
|
|
|
+ xsk_umem_complete_tx(umem, xsk_frames);
|
|
|
+}
|
David S. Miller