|
@@ -0,0 +1,56 @@
|
|
|
|
+* Samsung S3C2410 and compatible NAND flash controller
|
|
|
|
+
|
|
|
|
+Required properties:
|
|
|
|
+- compatible : The possible values are:
|
|
|
|
+ "samsung,s3c2410-nand"
|
|
|
|
+ "samsung,s3c2412-nand"
|
|
|
|
+ "samsung,s3c2440-nand"
|
|
|
|
+- reg : register's location and length.
|
|
|
|
+- #address-cells, #size-cells : see nand.txt
|
|
|
|
+- clocks : phandle to the nand controller clock
|
|
|
|
+- clock-names : must contain "nand"
|
|
|
|
+
|
|
|
|
+Optional child nodes:
|
|
|
|
+Child nodes representing the available nand chips.
|
|
|
|
+
|
|
|
|
+Optional child properties:
|
|
|
|
+- nand-ecc-mode : see nand.txt
|
|
|
|
+- nand-on-flash-bbt : see nand.txt
|
|
|
|
+
|
|
|
|
+Each child device node may optionally contain a 'partitions' sub-node,
|
|
|
|
+which further contains sub-nodes describing the flash partition mapping.
|
|
|
|
+See partition.txt for more detail.
|
|
|
|
+
|
|
|
|
+Example:
|
|
|
|
+
|
|
|
|
+nand-controller@4e000000 {
|
|
|
|
+ compatible = "samsung,s3c2440-nand";
|
|
|
|
+ reg = <0x4e000000 0x40>;
|
|
|
|
+
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
+
|
|
|
|
+ clocks = <&clocks HCLK_NAND>;
|
|
|
|
+ clock-names = "nand";
|
|
|
|
+
|
|
|
|
+ nand {
|
|
|
|
+ nand-ecc-mode = "soft";
|
|
|
|
+ nand-on-flash-bbt;
|
|
|
|
+
|
|
|
|
+ partitions {
|
|
|
|
+ compatible = "fixed-partitions";
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
+ #size-cells = <1>;
|
|
|
|
+
|
|
|
|
+ partition@0 {
|
|
|
|
+ label = "u-boot";
|
|
|
|
+ reg = <0 0x040000>;
|
|
|
|
+ };
|
|
|
|
+
|
|
|
|
+ partition@40000 {
|
|
|
|
+ label = "kernel";
|
|
|
|
+ reg = <0x040000 0x500000>;
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+ };
|
|
|
|
+};
|