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@@ -22,22 +22,28 @@
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#include "txrx.h"
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#include "debug.h"
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-void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
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+void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt, bool limit_mgmt_desc)
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{
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+ if (limit_mgmt_desc)
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+ htt->num_pending_mgmt_tx--;
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+
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htt->num_pending_tx--;
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if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
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ath10k_mac_tx_unlock(htt->ar, ATH10K_TX_PAUSE_Q_FULL);
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}
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-static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
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+static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt,
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+ bool limit_mgmt_desc)
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{
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spin_lock_bh(&htt->tx_lock);
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- __ath10k_htt_tx_dec_pending(htt);
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+ __ath10k_htt_tx_dec_pending(htt, limit_mgmt_desc);
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spin_unlock_bh(&htt->tx_lock);
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}
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-static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
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+static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt,
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+ bool limit_mgmt_desc, bool is_probe_resp)
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{
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+ struct ath10k *ar = htt->ar;
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int ret = 0;
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spin_lock_bh(&htt->tx_lock);
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@@ -47,6 +53,15 @@ static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
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goto exit;
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}
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+ if (limit_mgmt_desc) {
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+ if (is_probe_resp && (htt->num_pending_mgmt_tx >
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+ ar->hw_params.max_probe_resp_desc_thres)) {
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+ ret = -EBUSY;
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+ goto exit;
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+ }
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+ htt->num_pending_mgmt_tx++;
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+ }
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+
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htt->num_pending_tx++;
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if (htt->num_pending_tx == htt->max_num_pending_tx)
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ath10k_mac_tx_lock(htt->ar, ATH10K_TX_PAUSE_Q_FULL);
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@@ -417,8 +432,19 @@ int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
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int len = 0;
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int msdu_id = -1;
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int res;
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+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
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+ bool limit_mgmt_desc = false;
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+ bool is_probe_resp = false;
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+
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+ if (ar->hw_params.max_probe_resp_desc_thres) {
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+ limit_mgmt_desc = true;
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+
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+ if (ieee80211_is_probe_resp(hdr->frame_control))
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+ is_probe_resp = true;
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+ }
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+
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+ res = ath10k_htt_tx_inc_pending(htt, limit_mgmt_desc, is_probe_resp);
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- res = ath10k_htt_tx_inc_pending(htt);
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if (res)
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goto err;
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@@ -476,7 +502,7 @@ err_free_msdu_id:
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ath10k_htt_tx_free_msdu_id(htt, msdu_id);
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spin_unlock_bh(&htt->tx_lock);
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err_tx_dec:
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- ath10k_htt_tx_dec_pending(htt);
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+ ath10k_htt_tx_dec_pending(htt, limit_mgmt_desc);
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err:
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return res;
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}
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@@ -498,8 +524,18 @@ int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
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dma_addr_t paddr = 0;
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u32 frags_paddr = 0;
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struct htt_msdu_ext_desc *ext_desc = NULL;
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+ bool limit_mgmt_desc = false;
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+ bool is_probe_resp = false;
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+
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+ if (unlikely(ieee80211_is_mgmt(hdr->frame_control)) &&
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+ ar->hw_params.max_probe_resp_desc_thres) {
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+ limit_mgmt_desc = true;
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+
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+ if (ieee80211_is_probe_resp(hdr->frame_control))
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+ is_probe_resp = true;
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+ }
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- res = ath10k_htt_tx_inc_pending(htt);
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+ res = ath10k_htt_tx_inc_pending(htt, limit_mgmt_desc, is_probe_resp);
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if (res)
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goto err;
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@@ -678,7 +714,7 @@ err_free_msdu_id:
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ath10k_htt_tx_free_msdu_id(htt, msdu_id);
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spin_unlock_bh(&htt->tx_lock);
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err_tx_dec:
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- ath10k_htt_tx_dec_pending(htt);
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+ ath10k_htt_tx_dec_pending(htt, limit_mgmt_desc);
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err:
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return res;
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}
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