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@@ -176,49 +176,6 @@ symbol = value
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#endif /* !CONFIG_CPU_HAS_PREFETCH */
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-/*
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- * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
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- */
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-#if (_MIPS_ISA == _MIPS_ISA_MIPS1)
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-#define MOVN(rd, rs, rt) \
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- .set push; \
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- .set reorder; \
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- beqz rt, 9f; \
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- move rd, rs; \
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- .set pop; \
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-9:
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-#define MOVZ(rd, rs, rt) \
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- .set push; \
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- .set reorder; \
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- bnez rt, 9f; \
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- move rd, rs; \
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- .set pop; \
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-9:
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-#endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
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-#if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
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-#define MOVN(rd, rs, rt) \
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- .set push; \
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- .set noreorder; \
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- bnezl rt, 9f; \
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- move rd, rs; \
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- .set pop; \
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-9:
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-#define MOVZ(rd, rs, rt) \
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- .set push; \
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- .set noreorder; \
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- beqzl rt, 9f; \
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- move rd, rs; \
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- .set pop; \
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-9:
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-#endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
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-#if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
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- (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
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-#define MOVN(rd, rs, rt) \
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- movn rd, rs, rt
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-#define MOVZ(rd, rs, rt) \
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- movz rd, rs, rt
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-#endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */
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-
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/*
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* Stack alignment
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*/
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