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@@ -41,6 +41,7 @@
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#include <asm/ptrace.h>
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#include <asm/ptrace.h>
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#include <asm/hw_irq.h>
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#include <asm/hw_irq.h>
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#include <asm/cputhreads.h>
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#include <asm/cputhreads.h>
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+#include <asm/ppc-opcode.h>
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/* The physical memory is laid out such that the secondary processor
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/* The physical memory is laid out such that the secondary processor
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* spin code sits at 0x0000...0x00ff. On server, the vectors follow
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* spin code sits at 0x0000...0x00ff. On server, the vectors follow
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@@ -207,12 +208,12 @@ _GLOBAL(book3e_start_thread)
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/* If the thread id is invalid, just exit. */
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/* If the thread id is invalid, just exit. */
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b 13f
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b 13f
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10:
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10:
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- mttmr TMRN_IMSR0, r5
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- mttmr TMRN_INIA0, r4
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+ MTTMR(TMRN_IMSR0, 5)
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+ MTTMR(TMRN_INIA0, 4)
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b 12f
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b 12f
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11:
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11:
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- mttmr TMRN_IMSR1, r5
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- mttmr TMRN_INIA1, r4
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+ MTTMR(TMRN_IMSR1, 5)
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+ MTTMR(TMRN_INIA1, 4)
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12:
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12:
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isync
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isync
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li r6, 1
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li r6, 1
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