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@@ -41,6 +41,8 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw,
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#define ROCKCHIP_MMC_DEGREE_MASK 0x3
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#define ROCKCHIP_MMC_DEGREE_MASK 0x3
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#define ROCKCHIP_MMC_DELAYNUM_OFFSET 2
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#define ROCKCHIP_MMC_DELAYNUM_OFFSET 2
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#define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
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#define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
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+#define ROCKCHIP_MMC_INIT_STATE_RESET 0x1
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+#define ROCKCHIP_MMC_INIT_STATE_SHIFT 1
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#define PSECS_PER_SEC 1000000000000LL
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#define PSECS_PER_SEC 1000000000000LL
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@@ -143,6 +145,15 @@ struct clk *rockchip_clk_register_mmc(const char *name,
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mmc_clock->reg = reg;
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mmc_clock->reg = reg;
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mmc_clock->shift = shift;
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mmc_clock->shift = shift;
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+ /*
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+ * Assert init_state to soft reset the CLKGEN
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+ * for mmc tuning phase and degree
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+ */
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+ if (mmc_clock->shift == ROCKCHIP_MMC_INIT_STATE_SHIFT)
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+ writel(HIWORD_UPDATE(ROCKCHIP_MMC_INIT_STATE_RESET,
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+ ROCKCHIP_MMC_INIT_STATE_RESET,
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+ mmc_clock->shift), mmc_clock->reg);
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+
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clk = clk_register(NULL, &mmc_clock->hw);
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clk = clk_register(NULL, &mmc_clock->hw);
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if (IS_ERR(clk))
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if (IS_ERR(clk))
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goto err_free;
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goto err_free;
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