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@@ -87,33 +87,6 @@ enum read_mode {
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SPI_NOR_QUAD,
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SPI_NOR_QUAD,
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};
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};
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-/**
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- * struct spi_nor_xfer_cfg - Structure for defining a Serial Flash transfer
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- * @wren: command for "Write Enable", or 0x00 for not required
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- * @cmd: command for operation
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- * @cmd_pins: number of pins to send @cmd (1, 2, 4)
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- * @addr: address for operation
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- * @addr_pins: number of pins to send @addr (1, 2, 4)
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- * @addr_width: number of address bytes
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- * (3,4, or 0 for address not required)
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- * @mode: mode data
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- * @mode_pins: number of pins to send @mode (1, 2, 4)
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- * @mode_cycles: number of mode cycles (0 for mode not required)
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- * @dummy_cycles: number of dummy cycles (0 for dummy not required)
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- */
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-struct spi_nor_xfer_cfg {
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- u8 wren;
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- u8 cmd;
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- u8 cmd_pins;
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- u32 addr;
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- u8 addr_pins;
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- u8 addr_width;
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- u8 mode;
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- u8 mode_pins;
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- u8 mode_cycles;
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- u8 dummy_cycles;
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-};
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-
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#define SPI_NOR_MAX_CMD_SIZE 8
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#define SPI_NOR_MAX_CMD_SIZE 8
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enum spi_nor_ops {
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enum spi_nor_ops {
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SPI_NOR_OPS_READ = 0,
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SPI_NOR_OPS_READ = 0,
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@@ -144,14 +117,11 @@ struct mtd_info;
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* @flash_read: the mode of the read
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* @flash_read: the mode of the read
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* @sst_write_second: used by the SST write operation
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* @sst_write_second: used by the SST write operation
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* @flags: flag options for the current SPI-NOR (SNOR_F_*)
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* @flags: flag options for the current SPI-NOR (SNOR_F_*)
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- * @cfg: used by the read_xfer/write_xfer
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* @cmd_buf: used by the write_reg
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* @cmd_buf: used by the write_reg
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* @prepare: [OPTIONAL] do some preparations for the
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* @prepare: [OPTIONAL] do some preparations for the
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* read/write/erase/lock/unlock operations
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* read/write/erase/lock/unlock operations
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* @unprepare: [OPTIONAL] do some post work after the
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* @unprepare: [OPTIONAL] do some post work after the
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* read/write/erase/lock/unlock operations
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* read/write/erase/lock/unlock operations
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- * @read_xfer: [OPTIONAL] the read fundamental primitive
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- * @write_xfer: [OPTIONAL] the writefundamental primitive
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* @read_reg: [DRIVER-SPECIFIC] read out the register
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* @read_reg: [DRIVER-SPECIFIC] read out the register
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* @write_reg: [DRIVER-SPECIFIC] write data to the register
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* @write_reg: [DRIVER-SPECIFIC] write data to the register
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* @read: [DRIVER-SPECIFIC] read data from the SPI NOR
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* @read: [DRIVER-SPECIFIC] read data from the SPI NOR
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@@ -176,15 +146,10 @@ struct spi_nor {
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enum read_mode flash_read;
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enum read_mode flash_read;
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bool sst_write_second;
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bool sst_write_second;
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u32 flags;
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u32 flags;
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- struct spi_nor_xfer_cfg cfg;
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u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE];
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u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE];
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int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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- int (*read_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
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- u8 *buf, size_t len);
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- int (*write_xfer)(struct spi_nor *nor, struct spi_nor_xfer_cfg *cfg,
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- u8 *buf, size_t len);
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int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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