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@@ -9,6 +9,7 @@
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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+
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#include <linux/gpio/driver.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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@@ -24,6 +25,12 @@
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#include <linux/platform_device.h>
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#include <linux/platform_data/gpio-davinci.h>
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#include <linux/irqchip/chained_irq.h>
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+#include <linux/spinlock.h>
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+
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+#include <asm-generic/gpio.h>
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+
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+#define MAX_REGS_BANKS 5
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+#define MAX_INT_PER_BANK 32
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struct davinci_gpio_regs {
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u32 dir;
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@@ -45,6 +52,27 @@ typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
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static void __iomem *gpio_base;
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static unsigned int offset_array[5] = {0x10, 0x38, 0x60, 0x88, 0xb0};
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+struct davinci_gpio_irq_data {
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+ void __iomem *regs;
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+ struct davinci_gpio_controller *chip;
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+ int bank_num;
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+};
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+
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+struct davinci_gpio_controller {
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+ struct gpio_chip chip;
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+ struct irq_domain *irq_domain;
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+ /* Serialize access to GPIO registers */
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+ spinlock_t lock;
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+ void __iomem *regs[MAX_REGS_BANKS];
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+ int gpio_unbanked;
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+ int irqs[MAX_INT_PER_BANK];
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+};
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+
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+static inline u32 __gpio_mask(unsigned gpio)
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+{
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+ return 1 << (gpio % 32);
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+}
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+
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static inline struct davinci_gpio_regs __iomem *irq2regs(struct irq_data *d)
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{
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struct davinci_gpio_regs __iomem *g;
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