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@@ -137,6 +137,18 @@ static int pll_wait_for_lock(struct iproc_pll *pll)
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return -EIO;
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}
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+static void iproc_pll_write(const struct iproc_pll *pll, void __iomem *base,
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+ const u32 offset, u32 val)
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+{
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+ const struct iproc_pll_ctrl *ctrl = pll->ctrl;
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+
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+ writel(val, base + offset);
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+
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+ if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK &&
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+ base == pll->pll_base))
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+ val = readl(base + offset);
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+}
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+
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static void __pll_disable(struct iproc_pll *pll)
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{
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const struct iproc_pll_ctrl *ctrl = pll->ctrl;
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@@ -145,27 +157,24 @@ static void __pll_disable(struct iproc_pll *pll)
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if (ctrl->flags & IPROC_CLK_PLL_ASIU) {
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val = readl(pll->asiu_base + ctrl->asiu.offset);
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val &= ~(1 << ctrl->asiu.en_shift);
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- writel(val, pll->asiu_base + ctrl->asiu.offset);
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+ iproc_pll_write(pll, pll->asiu_base, ctrl->asiu.offset, val);
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}
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if (ctrl->flags & IPROC_CLK_EMBED_PWRCTRL) {
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val = readl(pll->pll_base + ctrl->aon.offset);
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val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift;
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- writel(val, pll->pll_base + ctrl->aon.offset);
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-
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->aon.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->aon.offset, val);
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}
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if (pll->pwr_base) {
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/* latch input value so core power can be shut down */
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val = readl(pll->pwr_base + ctrl->aon.offset);
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val |= 1 << ctrl->aon.iso_shift;
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- writel(val, pll->pwr_base + ctrl->aon.offset);
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+ iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val);
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/* power down the core */
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val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);
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- writel(val, pll->pwr_base + ctrl->aon.offset);
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+ iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val);
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}
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}
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@@ -177,10 +186,7 @@ static int __pll_enable(struct iproc_pll *pll)
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if (ctrl->flags & IPROC_CLK_EMBED_PWRCTRL) {
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val = readl(pll->pll_base + ctrl->aon.offset);
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val &= ~(bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift);
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- writel(val, pll->pll_base + ctrl->aon.offset);
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-
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->aon.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->aon.offset, val);
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}
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if (pll->pwr_base) {
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@@ -188,14 +194,14 @@ static int __pll_enable(struct iproc_pll *pll)
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val = readl(pll->pwr_base + ctrl->aon.offset);
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val |= bit_mask(ctrl->aon.pwr_width) << ctrl->aon.pwr_shift;
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val &= ~(1 << ctrl->aon.iso_shift);
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- writel(val, pll->pwr_base + ctrl->aon.offset);
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+ iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val);
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}
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/* certain PLLs also need to be ungated from the ASIU top level */
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if (ctrl->flags & IPROC_CLK_PLL_ASIU) {
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val = readl(pll->asiu_base + ctrl->asiu.offset);
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val |= (1 << ctrl->asiu.en_shift);
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- writel(val, pll->asiu_base + ctrl->asiu.offset);
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+ iproc_pll_write(pll, pll->asiu_base, ctrl->asiu.offset, val);
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}
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return 0;
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@@ -209,9 +215,7 @@ static void __pll_put_in_reset(struct iproc_pll *pll)
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val = readl(pll->pll_base + reset->offset);
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val &= ~(1 << reset->reset_shift | 1 << reset->p_reset_shift);
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- writel(val, pll->pll_base + reset->offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + reset->offset);
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+ iproc_pll_write(pll, pll->pll_base, reset->offset, val);
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}
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static void __pll_bring_out_reset(struct iproc_pll *pll, unsigned int kp,
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@@ -228,9 +232,7 @@ static void __pll_bring_out_reset(struct iproc_pll *pll, unsigned int kp,
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val |= ki << reset->ki_shift | kp << reset->kp_shift |
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ka << reset->ka_shift;
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val |= 1 << reset->reset_shift | 1 << reset->p_reset_shift;
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- writel(val, pll->pll_base + reset->offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + reset->offset);
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+ iproc_pll_write(pll, pll->pll_base, reset->offset, val);
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}
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static int pll_set_rate(struct iproc_clk *clk, unsigned int rate_index,
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@@ -285,9 +287,8 @@ static int pll_set_rate(struct iproc_clk *clk, unsigned int rate_index,
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/* put PLL in reset */
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__pll_put_in_reset(pll);
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- writel(0, pll->pll_base + ctrl->vco_ctrl.u_offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->vco_ctrl.u_offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->vco_ctrl.u_offset, 0);
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+
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val = readl(pll->pll_base + ctrl->vco_ctrl.l_offset);
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if (rate >= VCO_LOW && rate < VCO_MID)
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@@ -298,17 +299,13 @@ static int pll_set_rate(struct iproc_clk *clk, unsigned int rate_index,
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else
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val |= (1 << PLL_VCO_HIGH_SHIFT);
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- writel(val, pll->pll_base + ctrl->vco_ctrl.l_offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->vco_ctrl.l_offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->vco_ctrl.l_offset, val);
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/* program integer part of NDIV */
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val = readl(pll->pll_base + ctrl->ndiv_int.offset);
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val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift);
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val |= vco->ndiv_int << ctrl->ndiv_int.shift;
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- writel(val, pll->pll_base + ctrl->ndiv_int.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->ndiv_int.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->ndiv_int.offset, val);
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/* program fractional part of NDIV */
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if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) {
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@@ -316,18 +313,15 @@ static int pll_set_rate(struct iproc_clk *clk, unsigned int rate_index,
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val &= ~(bit_mask(ctrl->ndiv_frac.width) <<
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ctrl->ndiv_frac.shift);
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val |= vco->ndiv_frac << ctrl->ndiv_frac.shift;
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- writel(val, pll->pll_base + ctrl->ndiv_frac.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->ndiv_frac.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->ndiv_frac.offset,
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+ val);
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}
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/* program PDIV */
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val = readl(pll->pll_base + ctrl->pdiv.offset);
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val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift);
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val |= vco->pdiv << ctrl->pdiv.shift;
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- writel(val, pll->pll_base + ctrl->pdiv.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->pdiv.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->pdiv.offset, val);
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__pll_bring_out_reset(pll, kp, ka, ki);
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@@ -467,14 +461,12 @@ static int iproc_clk_enable(struct clk_hw *hw)
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/* channel enable is active low */
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val = readl(pll->pll_base + ctrl->enable.offset);
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val &= ~(1 << ctrl->enable.enable_shift);
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- writel(val, pll->pll_base + ctrl->enable.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->enable.offset, val);
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/* also make sure channel is not held */
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val = readl(pll->pll_base + ctrl->enable.offset);
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val &= ~(1 << ctrl->enable.hold_shift);
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- writel(val, pll->pll_base + ctrl->enable.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->enable.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->enable.offset, val);
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return 0;
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}
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@@ -491,9 +483,7 @@ static void iproc_clk_disable(struct clk_hw *hw)
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val = readl(pll->pll_base + ctrl->enable.offset);
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val |= 1 << ctrl->enable.enable_shift;
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- writel(val, pll->pll_base + ctrl->enable.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->enable.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->enable.offset, val);
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}
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static unsigned long iproc_clk_recalc_rate(struct clk_hw *hw,
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@@ -562,9 +552,7 @@ static int iproc_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift);
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val |= div << ctrl->mdiv.shift;
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}
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- writel(val, pll->pll_base + ctrl->mdiv.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->mdiv.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->mdiv.offset, val);
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clk->rate = parent_rate / div;
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return 0;
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@@ -591,9 +579,7 @@ static void iproc_pll_sw_cfg(struct iproc_pll *pll)
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val = readl(pll->pll_base + ctrl->sw_ctrl.offset);
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val |= BIT(ctrl->sw_ctrl.shift);
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- writel(val, pll->pll_base + ctrl->sw_ctrl.offset);
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- if (unlikely(ctrl->flags & IPROC_CLK_NEEDS_READ_BACK))
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- readl(pll->pll_base + ctrl->sw_ctrl.offset);
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+ iproc_pll_write(pll, pll->pll_base, ctrl->sw_ctrl.offset, val);
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}
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}
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