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@@ -114,6 +114,8 @@
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#define DSIM_SYNC_INFORM (1 << 27)
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#define DSIM_EOT_DISABLE (1 << 28)
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#define DSIM_MFLUSH_VS (1 << 29)
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+/* This flag is valid only for exynos3250/3472/4415/5260/5430 */
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+#define DSIM_CLKLANE_STOP (1 << 30)
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/* DSIM_ESCMODE */
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#define DSIM_TX_TRIGGER_RST (1 << 4)
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@@ -262,6 +264,7 @@ struct exynos_dsi_driver_data {
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unsigned int plltmr_reg;
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unsigned int has_freqband:1;
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+ unsigned int has_clklane_stop:1;
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};
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struct exynos_dsi {
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@@ -304,6 +307,7 @@ struct exynos_dsi {
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static struct exynos_dsi_driver_data exynos4_dsi_driver_data = {
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.plltmr_reg = 0x50,
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.has_freqband = 1,
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+ .has_clklane_stop = 1,
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};
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static struct exynos_dsi_driver_data exynos5_dsi_driver_data = {
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@@ -569,6 +573,7 @@ static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)
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static int exynos_dsi_init_link(struct exynos_dsi *dsi)
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{
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+ struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
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int timeout;
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u32 reg;
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u32 lanes_mask;
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@@ -650,6 +655,20 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi)
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reg |= DSIM_LANE_EN(lanes_mask);
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writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
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+ /*
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+ * Use non-continuous clock mode if the periparal wants and
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+ * host controller supports
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+ *
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+ * In non-continous clock mode, host controller will turn off
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+ * the HS clock between high-speed transmissions to reduce
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+ * power consumption.
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+ */
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+ if (driver_data->has_clklane_stop &&
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+ dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
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+ reg |= DSIM_CLKLANE_STOP;
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+ writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
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+ }
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+
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/* Check clock and data lane state are stop state */
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timeout = 100;
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do {
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