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@@ -68,8 +68,7 @@
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#define HW_LCDCLKDIV 0x01fc
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#define HW_LCDCLKDIV 0x01fc
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#define HW_ADCANACLKDIV 0x0200
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#define HW_ADCANACLKDIV 0x0200
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-static struct clk *clks[MAX_CLKS];
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-static struct clk_onecell_data clk_data;
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+static struct clk_hw_onecell_data *clk_data;
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static DEFINE_SPINLOCK(asm9260_clk_lock);
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static DEFINE_SPINLOCK(asm9260_clk_lock);
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struct asm9260_div_clk {
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struct asm9260_div_clk {
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@@ -267,12 +266,20 @@ static struct asm9260_mux_clock asm9260_mux_clks[] __initdata = {
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static void __init asm9260_acc_init(struct device_node *np)
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static void __init asm9260_acc_init(struct device_node *np)
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{
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{
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- struct clk *clk;
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+ struct clk_hw *hw;
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+ struct clk_hw **hws;
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const char *ref_clk, *pll_clk = "pll";
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const char *ref_clk, *pll_clk = "pll";
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u32 rate;
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u32 rate;
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int n;
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int n;
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u32 accuracy = 0;
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u32 accuracy = 0;
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+ clk_data = kzalloc(sizeof(*clk_data) +
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+ sizeof(*clk_data->hws) * MAX_CLKS, GFP_KERNEL);
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+ if (!clk_data)
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+ return;
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+ clk_data->num = MAX_CLKS;
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+ hws = clk_data->hws;
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+
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base = of_io_request_and_map(np, 0, np->name);
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base = of_io_request_and_map(np, 0, np->name);
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if (IS_ERR(base))
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if (IS_ERR(base))
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panic("%s: unable to map resource", np->name);
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panic("%s: unable to map resource", np->name);
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@@ -282,10 +289,10 @@ static void __init asm9260_acc_init(struct device_node *np)
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ref_clk = of_clk_get_parent_name(np, 0);
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ref_clk = of_clk_get_parent_name(np, 0);
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accuracy = clk_get_accuracy(__clk_lookup(ref_clk));
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accuracy = clk_get_accuracy(__clk_lookup(ref_clk));
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- clk = clk_register_fixed_rate_with_accuracy(NULL, pll_clk,
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+ hw = clk_hw_register_fixed_rate_with_accuracy(NULL, pll_clk,
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ref_clk, 0, rate, accuracy);
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ref_clk, 0, rate, accuracy);
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- if (IS_ERR(clk))
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+ if (IS_ERR(hw))
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panic("%s: can't register REFCLK. Check DT!", np->name);
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panic("%s: can't register REFCLK. Check DT!", np->name);
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for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {
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for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {
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@@ -293,7 +300,7 @@ static void __init asm9260_acc_init(struct device_node *np)
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mc->parent_names[0] = ref_clk;
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mc->parent_names[0] = ref_clk;
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mc->parent_names[1] = pll_clk;
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mc->parent_names[1] = pll_clk;
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- clk = clk_register_mux_table(NULL, mc->name, mc->parent_names,
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+ hw = clk_hw_register_mux_table(NULL, mc->name, mc->parent_names,
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mc->num_parents, mc->flags, base + mc->offset,
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mc->num_parents, mc->flags, base + mc->offset,
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0, mc->mask, 0, mc->table, &asm9260_clk_lock);
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0, mc->mask, 0, mc->table, &asm9260_clk_lock);
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}
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}
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@@ -302,7 +309,7 @@ static void __init asm9260_acc_init(struct device_node *np)
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for (n = 0; n < ARRAY_SIZE(asm9260_mux_gates); n++) {
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for (n = 0; n < ARRAY_SIZE(asm9260_mux_gates); n++) {
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const struct asm9260_gate_data *gd = &asm9260_mux_gates[n];
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const struct asm9260_gate_data *gd = &asm9260_mux_gates[n];
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- clk = clk_register_gate(NULL, gd->name,
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+ hw = clk_hw_register_gate(NULL, gd->name,
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gd->parent_name, gd->flags | CLK_SET_RATE_PARENT,
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gd->parent_name, gd->flags | CLK_SET_RATE_PARENT,
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base + gd->reg, gd->bit_idx, 0, &asm9260_clk_lock);
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base + gd->reg, gd->bit_idx, 0, &asm9260_clk_lock);
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}
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}
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@@ -311,7 +318,7 @@ static void __init asm9260_acc_init(struct device_node *np)
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for (n = 0; n < ARRAY_SIZE(asm9260_div_clks); n++) {
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for (n = 0; n < ARRAY_SIZE(asm9260_div_clks); n++) {
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const struct asm9260_div_clk *dc = &asm9260_div_clks[n];
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const struct asm9260_div_clk *dc = &asm9260_div_clks[n];
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- clks[dc->idx] = clk_register_divider(NULL, dc->name,
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+ hws[dc->idx] = clk_hw_register_divider(NULL, dc->name,
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dc->parent_name, CLK_SET_RATE_PARENT,
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dc->parent_name, CLK_SET_RATE_PARENT,
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base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,
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base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,
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&asm9260_clk_lock);
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&asm9260_clk_lock);
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@@ -321,14 +328,14 @@ static void __init asm9260_acc_init(struct device_node *np)
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for (n = 0; n < ARRAY_SIZE(asm9260_ahb_gates); n++) {
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for (n = 0; n < ARRAY_SIZE(asm9260_ahb_gates); n++) {
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const struct asm9260_gate_data *gd = &asm9260_ahb_gates[n];
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const struct asm9260_gate_data *gd = &asm9260_ahb_gates[n];
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- clks[gd->idx] = clk_register_gate(NULL, gd->name,
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+ hws[gd->idx] = clk_hw_register_gate(NULL, gd->name,
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gd->parent_name, gd->flags, base + gd->reg,
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gd->parent_name, gd->flags, base + gd->reg,
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gd->bit_idx, 0, &asm9260_clk_lock);
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gd->bit_idx, 0, &asm9260_clk_lock);
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}
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}
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/* check for errors on leaf clocks */
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/* check for errors on leaf clocks */
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for (n = 0; n < MAX_CLKS; n++) {
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for (n = 0; n < MAX_CLKS; n++) {
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- if (!IS_ERR(clks[n]))
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+ if (!IS_ERR(hws[n]))
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continue;
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continue;
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pr_err("%s: Unable to register leaf clock %d\n",
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pr_err("%s: Unable to register leaf clock %d\n",
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@@ -337,9 +344,7 @@ static void __init asm9260_acc_init(struct device_node *np)
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}
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}
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/* register clk-provider */
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/* register clk-provider */
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- clk_data.clks = clks;
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- clk_data.clk_num = MAX_CLKS;
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- of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
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+ of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
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return;
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return;
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fail:
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fail:
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iounmap(base);
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iounmap(base);
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