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@@ -12,24 +12,30 @@ Required properties:
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- "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
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- reg : Offset and length of the register set for the device
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- interrupts : Should contain CSPI/eCSPI interrupt
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-- cs-gpios : Specifies the gpio pins to be used for chipselects.
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- clocks : Clock specifiers for both ipg and per clocks.
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- clock-names : Clock names should include both "ipg" and "per"
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See the clock consumer binding,
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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-- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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- Documentation/devicetree/bindings/dma/dma.txt
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-- dma-names: DMA request names should include "tx" and "rx" if present.
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-Obsolete properties:
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-- fsl,spi-num-chipselects : Contains the number of the chipselect
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+Recommended properties:
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+- cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip
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+select lines can be used, they appear to always generate a pulse between each
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+word of a transfer. Most use cases will require GPIO based chip selects to
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+generate a valid transaction.
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Optional properties:
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+- num-cs : Number of total chip selects, see spi-bus.txt.
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+- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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+Documentation/devicetree/bindings/dma/dma.txt.
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+- dma-names: DMA request names, if present, should include "tx" and "rx".
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- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
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controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
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the SPI_READY mode-flag needs to be set too.
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Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
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+Obsolete properties:
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+- fsl,spi-num-chipselects : Contains the number of the chipselect
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+
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Example:
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ecspi@70010000 {
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