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@@ -67,8 +67,8 @@ int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate,
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if (validrate != rate)
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return -EINVAL;
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- sdrcrate = __clk_get_rate(sdrc_ick_p);
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- clkrate = __clk_get_rate(hw->clk);
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+ sdrcrate = clk_get_rate(sdrc_ick_p);
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+ clkrate = clk_hw_get_rate(hw);
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if (rate > clkrate)
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sdrcrate <<= ((rate / clkrate) >> 1);
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else
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@@ -86,7 +86,7 @@ int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate,
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/*
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* XXX This only needs to be done when the CPU frequency changes
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*/
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- _mpurate = __clk_get_rate(arm_fck_p) / CYCLES_PER_MHZ;
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+ _mpurate = clk_get_rate(arm_fck_p) / CYCLES_PER_MHZ;
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c = (_mpurate << SDRC_MPURATE_SCALE) >> SDRC_MPURATE_BASE_SHIFT;
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c += 1; /* for safety */
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c *= SDRC_MPURATE_LOOPS;
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