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@@ -3731,9 +3731,10 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
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}
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}
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}
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}
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- /* Training Pattern 3 support */
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+ /* Training Pattern 3 support, both source and sink */
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if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
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if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 &&
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- intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) {
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+ intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED &&
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+ (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) {
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intel_dp->use_tps3 = true;
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intel_dp->use_tps3 = true;
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DRM_DEBUG_KMS("Displayport TPS3 supported\n");
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DRM_DEBUG_KMS("Displayport TPS3 supported\n");
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} else
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} else
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