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@@ -119,14 +119,6 @@
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#define OMAP4430_PRCM_MPU_CPU0_MOD 0x0400
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#define OMAP4430_PRCM_MPU_CPU0_MOD 0x0400
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#define OMAP4430_PRCM_MPU_CPU1_MOD 0x0800
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#define OMAP4430_PRCM_MPU_CPU1_MOD 0x0800
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-/* Base Addresses for the OMAP4 */
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-
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-#define OMAP4430_CM1_BASE 0x4a004000
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-#define OMAP4430_CM2_BASE 0x4a008000
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-#define OMAP4430_PRM_BASE 0x4a306000
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-#define OMAP4430_SCRM_BASE 0x4a30a000
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-#define OMAP4430_CHIRONSS_BASE 0x48243000
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-
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/* 24XX register bits shared between CM & PRM registers */
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/* 24XX register bits shared between CM & PRM registers */
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