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@@ -1227,11 +1227,15 @@ static void ath10k_pci_irq_enable(struct ath10k *ar)
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static int ath10k_pci_hif_start(struct ath10k *ar)
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{
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+ struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif start\n");
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ath10k_pci_irq_enable(ar);
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ath10k_pci_rx_post(ar);
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+ pcie_capability_write_word(ar_pci->pdev, PCI_EXP_LNKCTL,
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+ ar_pci->link_ctl);
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+
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return 0;
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}
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@@ -1981,6 +1985,7 @@ static int ath10k_pci_chip_reset(struct ath10k *ar)
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static int ath10k_pci_hif_power_up(struct ath10k *ar)
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{
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+ struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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int ret;
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n");
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@@ -1991,6 +1996,11 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
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return ret;
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}
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+ pcie_capability_read_word(ar_pci->pdev, PCI_EXP_LNKCTL,
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+ &ar_pci->link_ctl);
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+ pcie_capability_write_word(ar_pci->pdev, PCI_EXP_LNKCTL,
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+ ar_pci->link_ctl & ~PCI_EXP_LNKCTL_ASPMC);
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+
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/*
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* Bring the target up cleanly.
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*
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@@ -2502,7 +2512,6 @@ static int ath10k_pci_claim(struct ath10k *ar)
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{
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struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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struct pci_dev *pdev = ar_pci->pdev;
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- u32 lcr_val;
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int ret;
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pci_set_drvdata(pdev, ar);
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@@ -2536,10 +2545,6 @@ static int ath10k_pci_claim(struct ath10k *ar)
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pci_set_master(pdev);
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- /* Workaround: Disable ASPM */
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- pci_read_config_dword(pdev, 0x80, &lcr_val);
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- pci_write_config_dword(pdev, 0x80, (lcr_val & 0xffffff00));
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-
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/* Arrange for access to Target SoC registers. */
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ar_pci->mem = pci_iomap(pdev, BAR_NUM, 0);
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if (!ar_pci->mem) {
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