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@@ -9,18 +9,16 @@
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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-
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+#include <linux/of.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/rtc.h>
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#include <linux/rtc.h>
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+#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm.h>
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+#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/spinlock.h>
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-#include <linux/mfd/pm8xxx/core.h>
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-#include <linux/mfd/pm8xxx/rtc.h>
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-
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-
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/* RTC Register offsets from RTC CTRL REG */
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/* RTC Register offsets from RTC CTRL REG */
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#define PM8XXX_ALARM_CTRL_OFFSET 0x01
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#define PM8XXX_ALARM_CTRL_OFFSET 0x01
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#define PM8XXX_RTC_WRITE_OFFSET 0x02
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#define PM8XXX_RTC_WRITE_OFFSET 0x02
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@@ -37,6 +35,8 @@
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/**
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/**
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* struct pm8xxx_rtc - rtc driver internal structure
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* struct pm8xxx_rtc - rtc driver internal structure
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* @rtc: rtc device for this driver.
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* @rtc: rtc device for this driver.
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+ * @regmap: regmap used to access RTC registers
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+ * @allow_set_time: indicates whether writing to the RTC is allowed
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* @rtc_alarm_irq: rtc alarm irq number.
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* @rtc_alarm_irq: rtc alarm irq number.
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* @rtc_base: address of rtc control register.
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* @rtc_base: address of rtc control register.
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* @rtc_read_base: base address of read registers.
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* @rtc_read_base: base address of read registers.
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@@ -48,54 +48,18 @@
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*/
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*/
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struct pm8xxx_rtc {
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struct pm8xxx_rtc {
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struct rtc_device *rtc;
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struct rtc_device *rtc;
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+ struct regmap *regmap;
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+ bool allow_set_time;
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int rtc_alarm_irq;
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int rtc_alarm_irq;
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int rtc_base;
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int rtc_base;
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int rtc_read_base;
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int rtc_read_base;
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int rtc_write_base;
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int rtc_write_base;
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int alarm_rw_base;
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int alarm_rw_base;
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- u8 ctrl_reg;
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+ u8 ctrl_reg;
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struct device *rtc_dev;
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struct device *rtc_dev;
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spinlock_t ctrl_reg_lock;
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spinlock_t ctrl_reg_lock;
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};
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};
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-/*
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- * The RTC registers need to be read/written one byte at a time. This is a
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- * hardware limitation.
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- */
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-static int pm8xxx_read_wrapper(struct pm8xxx_rtc *rtc_dd, u8 *rtc_val,
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- int base, int count)
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-{
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- int i, rc;
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- struct device *parent = rtc_dd->rtc_dev->parent;
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-
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- for (i = 0; i < count; i++) {
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- rc = pm8xxx_readb(parent, base + i, &rtc_val[i]);
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- if (rc < 0) {
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- dev_err(rtc_dd->rtc_dev, "PMIC read failed\n");
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- return rc;
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- }
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- }
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-
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- return 0;
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-}
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-
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-static int pm8xxx_write_wrapper(struct pm8xxx_rtc *rtc_dd, u8 *rtc_val,
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- int base, int count)
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-{
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- int i, rc;
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- struct device *parent = rtc_dd->rtc_dev->parent;
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-
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- for (i = 0; i < count; i++) {
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- rc = pm8xxx_writeb(parent, base + i, rtc_val[i]);
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- if (rc < 0) {
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- dev_err(rtc_dd->rtc_dev, "PMIC write failed\n");
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- return rc;
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- }
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- }
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-
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- return 0;
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-}
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-
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/*
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/*
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* Steps to write the RTC registers.
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* Steps to write the RTC registers.
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* 1. Disable alarm if enabled.
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* 1. Disable alarm if enabled.
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@@ -107,9 +71,12 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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{
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int rc, i;
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int rc, i;
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unsigned long secs, irq_flags;
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unsigned long secs, irq_flags;
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- u8 value[NUM_8_BIT_RTC_REGS], reg = 0, alarm_enabled = 0, ctrl_reg;
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+ u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, ctrl_reg;
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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+ if (!rtc_dd->allow_set_time)
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+ return -EACCES;
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+
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rtc_tm_to_time(tm, &secs);
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rtc_tm_to_time(tm, &secs);
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for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
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for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
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@@ -125,47 +92,43 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) {
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if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) {
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alarm_enabled = 1;
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alarm_enabled = 1;
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ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
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- 1);
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- if (rc < 0) {
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- dev_err(dev, "Write to RTC control register "
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- "failed\n");
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+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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+ if (rc) {
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+ dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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rtc_dd->ctrl_reg = ctrl_reg;
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rtc_dd->ctrl_reg = ctrl_reg;
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- } else
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+ } else {
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spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
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spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
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+ }
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/* Write 0 to Byte[0] */
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/* Write 0 to Byte[0] */
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- reg = 0;
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- rc = pm8xxx_write_wrapper(rtc_dd, ®, rtc_dd->rtc_write_base, 1);
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- if (rc < 0) {
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+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, 0);
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+ if (rc) {
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dev_err(dev, "Write to RTC write data register failed\n");
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dev_err(dev, "Write to RTC write data register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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/* Write Byte[1], Byte[2], Byte[3] */
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/* Write Byte[1], Byte[2], Byte[3] */
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- rc = pm8xxx_write_wrapper(rtc_dd, value + 1,
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- rtc_dd->rtc_write_base + 1, 3);
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- if (rc < 0) {
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+ rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->rtc_write_base + 1,
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+ &value[1], sizeof(value) - 1);
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+ if (rc) {
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dev_err(dev, "Write to RTC write data register failed\n");
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dev_err(dev, "Write to RTC write data register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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/* Write Byte[0] */
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/* Write Byte[0] */
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- rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->rtc_write_base, 1);
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- if (rc < 0) {
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+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, value[0]);
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+ if (rc) {
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dev_err(dev, "Write to RTC write data register failed\n");
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dev_err(dev, "Write to RTC write data register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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if (alarm_enabled) {
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if (alarm_enabled) {
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ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
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ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
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- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
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- 1);
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- if (rc < 0) {
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- dev_err(dev, "Write to RTC control register "
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- "failed\n");
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+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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+ if (rc) {
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+ dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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rtc_dd->ctrl_reg = ctrl_reg;
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rtc_dd->ctrl_reg = ctrl_reg;
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@@ -181,13 +144,14 @@ rtc_rw_fail:
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static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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{
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int rc;
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int rc;
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- u8 value[NUM_8_BIT_RTC_REGS], reg;
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+ u8 value[NUM_8_BIT_RTC_REGS];
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unsigned long secs;
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unsigned long secs;
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+ unsigned int reg;
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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- rc = pm8xxx_read_wrapper(rtc_dd, value, rtc_dd->rtc_read_base,
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- NUM_8_BIT_RTC_REGS);
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- if (rc < 0) {
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+ rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
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+ value, sizeof(value));
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+ if (rc) {
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dev_err(dev, "RTC read data register failed\n");
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dev_err(dev, "RTC read data register failed\n");
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return rc;
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return rc;
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}
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}
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@@ -196,16 +160,16 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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* Read the LSB again and check if there has been a carry over.
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* Read the LSB again and check if there has been a carry over.
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* If there is, redo the read operation.
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* If there is, redo the read operation.
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*/
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*/
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- rc = pm8xxx_read_wrapper(rtc_dd, ®, rtc_dd->rtc_read_base, 1);
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+ rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_read_base, ®);
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if (rc < 0) {
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if (rc < 0) {
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dev_err(dev, "RTC read data register failed\n");
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dev_err(dev, "RTC read data register failed\n");
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return rc;
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return rc;
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}
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}
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if (unlikely(reg < value[0])) {
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if (unlikely(reg < value[0])) {
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- rc = pm8xxx_read_wrapper(rtc_dd, value,
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- rtc_dd->rtc_read_base, NUM_8_BIT_RTC_REGS);
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- if (rc < 0) {
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+ rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
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+ value, sizeof(value));
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+ if (rc) {
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dev_err(dev, "RTC read data register failed\n");
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dev_err(dev, "RTC read data register failed\n");
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return rc;
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return rc;
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}
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}
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@@ -222,8 +186,8 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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}
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}
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dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
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dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
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- secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
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- tm->tm_mday, tm->tm_mon, tm->tm_year);
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+ secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
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+ tm->tm_mday, tm->tm_mon, tm->tm_year);
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return 0;
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return 0;
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}
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}
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@@ -244,19 +208,22 @@ static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
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spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
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- rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base,
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- NUM_8_BIT_RTC_REGS);
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- if (rc < 0) {
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+ rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
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+ sizeof(value));
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+ if (rc) {
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dev_err(dev, "Write to RTC ALARM register failed\n");
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dev_err(dev, "Write to RTC ALARM register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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ctrl_reg = rtc_dd->ctrl_reg;
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ctrl_reg = rtc_dd->ctrl_reg;
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- ctrl_reg = alarm->enabled ? (ctrl_reg | PM8xxx_RTC_ALARM_ENABLE) :
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- (ctrl_reg & ~PM8xxx_RTC_ALARM_ENABLE);
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- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
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- if (rc < 0) {
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+ if (alarm->enabled)
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+ ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
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+ else
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+ ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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+
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+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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+ if (rc) {
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dev_err(dev, "Write to RTC control register failed\n");
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dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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goto rtc_rw_fail;
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}
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}
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@@ -264,9 +231,9 @@ static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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rtc_dd->ctrl_reg = ctrl_reg;
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rtc_dd->ctrl_reg = ctrl_reg;
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dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
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dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
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- alarm->time.tm_hour, alarm->time.tm_min,
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- alarm->time.tm_sec, alarm->time.tm_mday,
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- alarm->time.tm_mon, alarm->time.tm_year);
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+ alarm->time.tm_hour, alarm->time.tm_min,
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+ alarm->time.tm_sec, alarm->time.tm_mday,
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+ alarm->time.tm_mon, alarm->time.tm_year);
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rtc_rw_fail:
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rtc_rw_fail:
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spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
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spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
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return rc;
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return rc;
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@@ -279,9 +246,9 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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unsigned long secs;
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unsigned long secs;
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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- rc = pm8xxx_read_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base,
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- NUM_8_BIT_RTC_REGS);
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- if (rc < 0) {
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+ rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
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+ sizeof(value));
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+ if (rc) {
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dev_err(dev, "RTC alarm time read failed\n");
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dev_err(dev, "RTC alarm time read failed\n");
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return rc;
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return rc;
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}
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}
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@@ -297,9 +264,9 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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}
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}
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dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
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|
dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
|
|
- alarm->time.tm_hour, alarm->time.tm_min,
|
|
|
|
- alarm->time.tm_sec, alarm->time.tm_mday,
|
|
|
|
- alarm->time.tm_mon, alarm->time.tm_year);
|
|
|
|
|
|
+ alarm->time.tm_hour, alarm->time.tm_min,
|
|
|
|
+ alarm->time.tm_sec, alarm->time.tm_mday,
|
|
|
|
+ alarm->time.tm_mon, alarm->time.tm_year);
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
@@ -312,12 +279,16 @@ static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
|
|
u8 ctrl_reg;
|
|
u8 ctrl_reg;
|
|
|
|
|
|
spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
|
|
spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
|
|
|
|
+
|
|
ctrl_reg = rtc_dd->ctrl_reg;
|
|
ctrl_reg = rtc_dd->ctrl_reg;
|
|
- ctrl_reg = (enable) ? (ctrl_reg | PM8xxx_RTC_ALARM_ENABLE) :
|
|
|
|
- (ctrl_reg & ~PM8xxx_RTC_ALARM_ENABLE);
|
|
|
|
|
|
|
|
- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
|
|
|
|
- if (rc < 0) {
|
|
|
|
|
|
+ if (enable)
|
|
|
|
+ ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
|
|
|
|
+ else
|
|
|
|
+ ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
|
|
|
|
+
|
|
|
|
+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
|
|
|
|
+ if (rc) {
|
|
dev_err(dev, "Write to RTC control register failed\n");
|
|
dev_err(dev, "Write to RTC control register failed\n");
|
|
goto rtc_rw_fail;
|
|
goto rtc_rw_fail;
|
|
}
|
|
}
|
|
@@ -329,8 +300,9 @@ rtc_rw_fail:
|
|
return rc;
|
|
return rc;
|
|
}
|
|
}
|
|
|
|
|
|
-static struct rtc_class_ops pm8xxx_rtc_ops = {
|
|
|
|
|
|
+static const struct rtc_class_ops pm8xxx_rtc_ops = {
|
|
.read_time = pm8xxx_rtc_read_time,
|
|
.read_time = pm8xxx_rtc_read_time,
|
|
|
|
+ .set_time = pm8xxx_rtc_set_time,
|
|
.set_alarm = pm8xxx_rtc_set_alarm,
|
|
.set_alarm = pm8xxx_rtc_set_alarm,
|
|
.read_alarm = pm8xxx_rtc_read_alarm,
|
|
.read_alarm = pm8xxx_rtc_read_alarm,
|
|
.alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
|
|
.alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
|
|
@@ -339,7 +311,7 @@ static struct rtc_class_ops pm8xxx_rtc_ops = {
|
|
static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
|
|
static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
|
|
{
|
|
{
|
|
struct pm8xxx_rtc *rtc_dd = dev_id;
|
|
struct pm8xxx_rtc *rtc_dd = dev_id;
|
|
- u8 ctrl_reg;
|
|
|
|
|
|
+ unsigned int ctrl_reg;
|
|
int rc;
|
|
int rc;
|
|
unsigned long irq_flags;
|
|
unsigned long irq_flags;
|
|
|
|
|
|
@@ -351,11 +323,11 @@ static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
|
|
ctrl_reg = rtc_dd->ctrl_reg;
|
|
ctrl_reg = rtc_dd->ctrl_reg;
|
|
ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
|
|
ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
|
|
|
|
|
|
- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
|
|
|
|
- if (rc < 0) {
|
|
|
|
|
|
+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
|
|
|
|
+ if (rc) {
|
|
spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
|
|
spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
|
|
- dev_err(rtc_dd->rtc_dev, "Write to RTC control register "
|
|
|
|
- "failed\n");
|
|
|
|
|
|
+ dev_err(rtc_dd->rtc_dev,
|
|
|
|
+ "Write to RTC control register failed\n");
|
|
goto rtc_alarm_handled;
|
|
goto rtc_alarm_handled;
|
|
}
|
|
}
|
|
|
|
|
|
@@ -363,61 +335,71 @@ static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
|
|
spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
|
|
spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
|
|
|
|
|
|
/* Clear RTC alarm register */
|
|
/* Clear RTC alarm register */
|
|
- rc = pm8xxx_read_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base +
|
|
|
|
- PM8XXX_ALARM_CTRL_OFFSET, 1);
|
|
|
|
- if (rc < 0) {
|
|
|
|
- dev_err(rtc_dd->rtc_dev, "RTC Alarm control register read "
|
|
|
|
- "failed\n");
|
|
|
|
|
|
+ rc = regmap_read(rtc_dd->regmap,
|
|
|
|
+ rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
|
|
|
|
+ &ctrl_reg);
|
|
|
|
+ if (rc) {
|
|
|
|
+ dev_err(rtc_dd->rtc_dev,
|
|
|
|
+ "RTC Alarm control register read failed\n");
|
|
goto rtc_alarm_handled;
|
|
goto rtc_alarm_handled;
|
|
}
|
|
}
|
|
|
|
|
|
ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR;
|
|
ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR;
|
|
- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base +
|
|
|
|
- PM8XXX_ALARM_CTRL_OFFSET, 1);
|
|
|
|
- if (rc < 0)
|
|
|
|
- dev_err(rtc_dd->rtc_dev, "Write to RTC Alarm control register"
|
|
|
|
- " failed\n");
|
|
|
|
|
|
+ rc = regmap_write(rtc_dd->regmap,
|
|
|
|
+ rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
|
|
|
|
+ ctrl_reg);
|
|
|
|
+ if (rc)
|
|
|
|
+ dev_err(rtc_dd->rtc_dev,
|
|
|
|
+ "Write to RTC Alarm control register failed\n");
|
|
|
|
|
|
rtc_alarm_handled:
|
|
rtc_alarm_handled:
|
|
return IRQ_HANDLED;
|
|
return IRQ_HANDLED;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+/*
|
|
|
|
+ * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
|
|
|
|
+ */
|
|
|
|
+static const struct of_device_id pm8xxx_id_table[] = {
|
|
|
|
+ { .compatible = "qcom,pm8921-rtc", .data = (void *) 0x11D },
|
|
|
|
+ { .compatible = "qcom,pm8058-rtc", .data = (void *) 0x1E8 },
|
|
|
|
+ { },
|
|
|
|
+};
|
|
|
|
+MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
|
|
|
|
+
|
|
static int pm8xxx_rtc_probe(struct platform_device *pdev)
|
|
static int pm8xxx_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
{
|
|
int rc;
|
|
int rc;
|
|
- u8 ctrl_reg;
|
|
|
|
- bool rtc_write_enable = false;
|
|
|
|
|
|
+ unsigned int ctrl_reg;
|
|
struct pm8xxx_rtc *rtc_dd;
|
|
struct pm8xxx_rtc *rtc_dd;
|
|
- struct resource *rtc_resource;
|
|
|
|
- const struct pm8xxx_rtc_platform_data *pdata =
|
|
|
|
- dev_get_platdata(&pdev->dev);
|
|
|
|
|
|
+ const struct of_device_id *match;
|
|
|
|
|
|
- if (pdata != NULL)
|
|
|
|
- rtc_write_enable = pdata->rtc_write_enable;
|
|
|
|
|
|
+ match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
|
|
|
|
+ if (!match)
|
|
|
|
+ return -ENXIO;
|
|
|
|
|
|
rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
|
|
rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
|
|
- if (rtc_dd == NULL) {
|
|
|
|
- dev_err(&pdev->dev, "Unable to allocate memory!\n");
|
|
|
|
|
|
+ if (rtc_dd == NULL)
|
|
return -ENOMEM;
|
|
return -ENOMEM;
|
|
- }
|
|
|
|
|
|
|
|
/* Initialise spinlock to protect RTC control register */
|
|
/* Initialise spinlock to protect RTC control register */
|
|
spin_lock_init(&rtc_dd->ctrl_reg_lock);
|
|
spin_lock_init(&rtc_dd->ctrl_reg_lock);
|
|
|
|
|
|
|
|
+ rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
|
|
|
|
+ if (!rtc_dd->regmap) {
|
|
|
|
+ dev_err(&pdev->dev, "Parent regmap unavailable.\n");
|
|
|
|
+ return -ENXIO;
|
|
|
|
+ }
|
|
|
|
+
|
|
rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
|
|
rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
|
|
if (rtc_dd->rtc_alarm_irq < 0) {
|
|
if (rtc_dd->rtc_alarm_irq < 0) {
|
|
dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
|
|
dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
|
|
return -ENXIO;
|
|
return -ENXIO;
|
|
}
|
|
}
|
|
|
|
|
|
- rtc_resource = platform_get_resource_byname(pdev, IORESOURCE_IO,
|
|
|
|
- "pmic_rtc_base");
|
|
|
|
- if (!(rtc_resource && rtc_resource->start)) {
|
|
|
|
- dev_err(&pdev->dev, "RTC IO resource absent!\n");
|
|
|
|
- return -ENXIO;
|
|
|
|
- }
|
|
|
|
|
|
+ rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
|
|
|
|
+ "allow-set-time");
|
|
|
|
|
|
- rtc_dd->rtc_base = rtc_resource->start;
|
|
|
|
|
|
+ rtc_dd->rtc_base = (long) match->data;
|
|
|
|
|
|
/* Setup RTC register addresses */
|
|
/* Setup RTC register addresses */
|
|
rtc_dd->rtc_write_base = rtc_dd->rtc_base + PM8XXX_RTC_WRITE_OFFSET;
|
|
rtc_dd->rtc_write_base = rtc_dd->rtc_base + PM8XXX_RTC_WRITE_OFFSET;
|
|
@@ -427,64 +409,52 @@ static int pm8xxx_rtc_probe(struct platform_device *pdev)
|
|
rtc_dd->rtc_dev = &pdev->dev;
|
|
rtc_dd->rtc_dev = &pdev->dev;
|
|
|
|
|
|
/* Check if the RTC is on, else turn it on */
|
|
/* Check if the RTC is on, else turn it on */
|
|
- rc = pm8xxx_read_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
|
|
|
|
- if (rc < 0) {
|
|
|
|
|
|
+ rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_base, &ctrl_reg);
|
|
|
|
+ if (rc) {
|
|
dev_err(&pdev->dev, "RTC control register read failed!\n");
|
|
dev_err(&pdev->dev, "RTC control register read failed!\n");
|
|
return rc;
|
|
return rc;
|
|
}
|
|
}
|
|
|
|
|
|
if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
|
|
if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
|
|
ctrl_reg |= PM8xxx_RTC_ENABLE;
|
|
ctrl_reg |= PM8xxx_RTC_ENABLE;
|
|
- rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
|
|
|
|
- 1);
|
|
|
|
- if (rc < 0) {
|
|
|
|
- dev_err(&pdev->dev, "Write to RTC control register "
|
|
|
|
- "failed\n");
|
|
|
|
|
|
+ rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
|
|
|
|
+ if (rc) {
|
|
|
|
+ dev_err(&pdev->dev,
|
|
|
|
+ "Write to RTC control register failed\n");
|
|
return rc;
|
|
return rc;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
rtc_dd->ctrl_reg = ctrl_reg;
|
|
rtc_dd->ctrl_reg = ctrl_reg;
|
|
- if (rtc_write_enable == true)
|
|
|
|
- pm8xxx_rtc_ops.set_time = pm8xxx_rtc_set_time;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, rtc_dd);
|
|
platform_set_drvdata(pdev, rtc_dd);
|
|
|
|
|
|
|
|
+ device_init_wakeup(&pdev->dev, 1);
|
|
|
|
+
|
|
/* Register the RTC device */
|
|
/* Register the RTC device */
|
|
rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
|
|
rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
|
|
- &pm8xxx_rtc_ops, THIS_MODULE);
|
|
|
|
|
|
+ &pm8xxx_rtc_ops, THIS_MODULE);
|
|
if (IS_ERR(rtc_dd->rtc)) {
|
|
if (IS_ERR(rtc_dd->rtc)) {
|
|
dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
|
|
dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
|
|
- __func__, PTR_ERR(rtc_dd->rtc));
|
|
|
|
|
|
+ __func__, PTR_ERR(rtc_dd->rtc));
|
|
return PTR_ERR(rtc_dd->rtc);
|
|
return PTR_ERR(rtc_dd->rtc);
|
|
}
|
|
}
|
|
|
|
|
|
/* Request the alarm IRQ */
|
|
/* Request the alarm IRQ */
|
|
- rc = request_any_context_irq(rtc_dd->rtc_alarm_irq,
|
|
|
|
- pm8xxx_alarm_trigger, IRQF_TRIGGER_RISING,
|
|
|
|
- "pm8xxx_rtc_alarm", rtc_dd);
|
|
|
|
|
|
+ rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
|
|
|
|
+ pm8xxx_alarm_trigger,
|
|
|
|
+ IRQF_TRIGGER_RISING,
|
|
|
|
+ "pm8xxx_rtc_alarm", rtc_dd);
|
|
if (rc < 0) {
|
|
if (rc < 0) {
|
|
dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
|
|
dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
|
|
return rc;
|
|
return rc;
|
|
}
|
|
}
|
|
|
|
|
|
- device_init_wakeup(&pdev->dev, 1);
|
|
|
|
-
|
|
|
|
dev_dbg(&pdev->dev, "Probe success !!\n");
|
|
dev_dbg(&pdev->dev, "Probe success !!\n");
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
-static int pm8xxx_rtc_remove(struct platform_device *pdev)
|
|
|
|
-{
|
|
|
|
- struct pm8xxx_rtc *rtc_dd = platform_get_drvdata(pdev);
|
|
|
|
-
|
|
|
|
- device_init_wakeup(&pdev->dev, 0);
|
|
|
|
- free_irq(rtc_dd->rtc_alarm_irq, rtc_dd);
|
|
|
|
-
|
|
|
|
- return 0;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int pm8xxx_rtc_resume(struct device *dev)
|
|
static int pm8xxx_rtc_resume(struct device *dev)
|
|
{
|
|
{
|
|
@@ -507,15 +477,17 @@ static int pm8xxx_rtc_suspend(struct device *dev)
|
|
}
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
|
|
-static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops, pm8xxx_rtc_suspend, pm8xxx_rtc_resume);
|
|
|
|
|
|
+static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
|
|
|
|
+ pm8xxx_rtc_suspend,
|
|
|
|
+ pm8xxx_rtc_resume);
|
|
|
|
|
|
static struct platform_driver pm8xxx_rtc_driver = {
|
|
static struct platform_driver pm8xxx_rtc_driver = {
|
|
.probe = pm8xxx_rtc_probe,
|
|
.probe = pm8xxx_rtc_probe,
|
|
- .remove = pm8xxx_rtc_remove,
|
|
|
|
.driver = {
|
|
.driver = {
|
|
- .name = PM8XXX_RTC_DEV_NAME,
|
|
|
|
- .owner = THIS_MODULE,
|
|
|
|
- .pm = &pm8xxx_rtc_pm_ops,
|
|
|
|
|
|
+ .name = "rtc-pm8xxx",
|
|
|
|
+ .owner = THIS_MODULE,
|
|
|
|
+ .pm = &pm8xxx_rtc_pm_ops,
|
|
|
|
+ .of_match_table = pm8xxx_id_table,
|
|
},
|
|
},
|
|
};
|
|
};
|
|
|
|
|