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@@ -13,7 +13,9 @@
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/cpu.h>
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+#include <linux/clk-provider.h>
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#include <linux/of_fdt.h>
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+#include <linux/of_platform.h>
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#include <linux/cache.h>
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#include <asm/sections.h>
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#include <asm/arcregs.h>
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@@ -24,11 +26,10 @@
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#include <asm/unwind.h>
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#include <asm/clk.h>
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#include <asm/mach_desc.h>
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+#include <asm/smp.h>
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#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
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-int running_on_hw = 1; /* vs. on ISS */
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-
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/* Part of U-boot ABI: see head.S */
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int __initdata uboot_tag;
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char __initdata *uboot_arg;
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@@ -42,26 +43,26 @@ struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
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static void read_arc_build_cfg_regs(void)
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{
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struct bcr_perip uncached_space;
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+ struct bcr_generic bcr;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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FIX_PTR(cpu);
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READ_BCR(AUX_IDENTITY, cpu->core);
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+ READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
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- cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
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+ READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
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cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
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READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
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cpu->uncached_base = uncached_space.start << 24;
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- cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
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- cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
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- cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
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- cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
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- cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
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- READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
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+ READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
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- cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
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- cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
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+ cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
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+ cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
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+ cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
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+ cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
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+ cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
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/* Note that we read the CCM BCRs independent of kernel config
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* This is to catch the cases where user doesn't know that
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@@ -95,43 +96,76 @@ static void read_arc_build_cfg_regs(void)
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read_decode_mmu_bcr();
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read_decode_cache_bcr();
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- READ_BCR(ARC_REG_FP_BCR, cpu->fp);
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- READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
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+ {
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+ struct bcr_fp_arcompact sp, dp;
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+ struct bcr_bpu_arcompact bpu;
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+
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+ READ_BCR(ARC_REG_FP_BCR, sp);
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+ READ_BCR(ARC_REG_DPFP_BCR, dp);
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+ cpu->extn.fpu_sp = sp.ver ? 1 : 0;
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+ cpu->extn.fpu_dp = dp.ver ? 1 : 0;
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+
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+ READ_BCR(ARC_REG_BPU_BCR, bpu);
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+ cpu->bpu.ver = bpu.ver;
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+ cpu->bpu.full = bpu.fam ? 1 : 0;
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+ if (bpu.ent) {
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+ cpu->bpu.num_cache = 256 << (bpu.ent - 1);
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+ cpu->bpu.num_pred = 256 << (bpu.ent - 1);
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+ }
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+ }
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+
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+ READ_BCR(ARC_REG_AP_BCR, bcr);
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+ cpu->extn.ap = bcr.ver ? 1 : 0;
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+
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+ READ_BCR(ARC_REG_SMART_BCR, bcr);
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+ cpu->extn.smart = bcr.ver ? 1 : 0;
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+
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+ cpu->extn.debug = cpu->extn.ap | cpu->extn.smart;
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}
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static const struct cpuinfo_data arc_cpu_tbl[] = {
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- { {0x10, "ARCTangent A5"}, 0x1F},
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{ {0x20, "ARC 600" }, 0x2F},
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{ {0x30, "ARC 700" }, 0x33},
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{ {0x34, "ARC 700 R4.10"}, 0x34},
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+ { {0x35, "ARC 700 R4.11"}, 0x35},
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{ {0x00, NULL } }
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};
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+#define IS_AVAIL1(v, str) ((v) ? str : "")
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+#define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ")
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+#define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))
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+
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static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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{
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- int n = 0;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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struct bcr_identity *core = &cpu->core;
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const struct cpuinfo_data *tbl;
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- int be = 0;
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-#ifdef CONFIG_CPU_BIG_ENDIAN
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- be = 1;
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-#endif
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+ char *isa_nm;
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+ int i, be, atomic;
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+ int n = 0;
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+
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FIX_PTR(cpu);
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+ {
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+ isa_nm = "ARCompact";
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+ be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
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+
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+ atomic = cpu->isa.atomic1;
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+ if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
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+ atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
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+ }
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+
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n += scnprintf(buf + n, len - n,
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- "\nARC IDENTITY\t: Family [%#02x]"
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- " Cpu-id [%#02x] Chip-id [%#4x]\n",
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- core->family, core->cpu_id,
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- core->chip_id);
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+ "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
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+ core->family, core->cpu_id, core->chip_id);
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for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
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if ((core->family >= tbl->info.id) &&
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(core->family <= tbl->up_range)) {
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n += scnprintf(buf + n, len - n,
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- "processor\t: %s %s\n",
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- tbl->info.str,
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- be ? "[Big Endian]" : "");
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+ "processor [%d]\t: %s (%s ISA) %s\n",
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+ cpu_id, tbl->info.str, isa_nm,
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+ IS_AVAIL1(be, "[Big-Endian]"));
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break;
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}
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}
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@@ -143,34 +177,35 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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(unsigned int)(arc_get_core_freq() / 1000000),
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(unsigned int)(arc_get_core_freq() / 10000) % 100);
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- n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
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- (cpu->timers & 0x200) ? "TIMER1" : "",
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- (cpu->timers & 0x100) ? "TIMER0" : "");
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+ n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
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+ IS_AVAIL1(cpu->timers.t0, "Timer0 "),
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+ IS_AVAIL1(cpu->timers.t1, "Timer1 "),
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+ IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));
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- n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
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- cpu->vec_base);
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+ n += i = scnprintf(buf + n, len - n, "%s%s",
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+ IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
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- n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
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- cpu->uncached_base);
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+ if (i)
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+ n += scnprintf(buf + n, len - n, "\n\t\t: ");
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- return buf;
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-}
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+ n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
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+ IS_AVAIL1(cpu->extn_mpy.ver, "mpy "),
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+ IS_AVAIL1(cpu->extn.norm, "norm "),
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+ IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
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+ IS_AVAIL1(cpu->extn.swap, "swap "),
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+ IS_AVAIL1(cpu->extn.minmax, "minmax "),
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+ IS_AVAIL1(cpu->extn.crc, "crc "),
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+ IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
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-static const struct id_to_str mul_type_nm[] = {
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- { 0x0, "N/A"},
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- { 0x1, "32x32 (spl Result Reg)" },
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- { 0x2, "32x32 (ANY Result Reg)" }
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-};
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+ if (cpu->bpu.ver)
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+ n += scnprintf(buf + n, len - n,
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+ "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
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+ IS_AVAIL1(cpu->bpu.full, "full"),
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+ IS_AVAIL1(!cpu->bpu.full, "partial"),
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+ cpu->bpu.num_cache, cpu->bpu.num_pred);
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-static const struct id_to_str mac_mul_nm[] = {
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- {0x0, "N/A"},
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- {0x1, "N/A"},
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- {0x2, "Dual 16 x 16"},
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- {0x3, "N/A"},
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- {0x4, "32x16"},
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- {0x5, "N/A"},
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- {0x6, "Dual 16x16 and 32x16"}
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-};
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+ return buf;
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+}
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static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
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{
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@@ -178,67 +213,46 @@ static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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FIX_PTR(cpu);
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-#define IS_AVAIL1(var, str) ((var) ? str : "")
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-#define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
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-#define IS_USED(cfg) (IS_ENABLED(cfg) ? "(in-use)" : "(not used)")
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n += scnprintf(buf + n, len - n,
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- "Extn [700-Base]\t: %s %s %s %s %s %s\n",
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- IS_AVAIL2(cpu->extn.norm, "norm,"),
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- IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
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- IS_AVAIL1(cpu->extn.swap, "swap,"),
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- IS_AVAIL2(cpu->extn.minmax, "minmax,"),
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- IS_AVAIL1(cpu->extn.crc, "crc,"),
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- IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
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-
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- n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
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- mul_type_nm[cpu->extn.mul].str);
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-
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- n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
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- mac_mul_nm[cpu->extn_mac_mul.type].str);
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-
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- if (cpu->core.family == 0x34) {
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- n += scnprintf(buf + n, len - n,
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- "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
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- IS_USED(CONFIG_ARC_HAS_LLSC),
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- IS_USED(CONFIG_ARC_HAS_SWAPE),
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- IS_USED(CONFIG_ARC_HAS_RTSC));
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- }
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-
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- n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
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- !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
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-
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- if (cpu->dccm.sz)
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- n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
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- cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
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-
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- if (cpu->iccm.sz)
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- n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
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+ "Vector Table\t: %#x\nUncached Base\t: %#x\n",
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+ cpu->vec_base, cpu->uncached_base);
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+
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+ if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
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+ n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
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+ IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
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+ IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
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+
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+ if (cpu->extn.debug)
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+ n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
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+ IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
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+ IS_AVAIL1(cpu->extn.smart, "smaRT "),
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+ IS_AVAIL1(cpu->extn.rtt, "RTT "));
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+
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+ if (cpu->dccm.sz || cpu->iccm.sz)
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+ n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
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+ cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
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cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
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- n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
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- !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
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-
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- if (cpu->fp.ver)
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- n += scnprintf(buf + n, len - n, "SP [v%d] %s",
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- cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
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-
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- if (cpu->dpfp.ver)
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- n += scnprintf(buf + n, len - n, "DP [v%d] %s",
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- cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
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-
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- n += scnprintf(buf + n, len - n, "\n");
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-
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n += scnprintf(buf + n, len - n,
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"OS ABI [v3]\t: no-legacy-syscalls\n");
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return buf;
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}
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-static void arc_chk_ccms(void)
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+static void arc_chk_core_config(void)
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{
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-#if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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+ int fpu_enabled;
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+
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+ if (!cpu->timers.t0)
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+ panic("Timer0 is not present!\n");
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+
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+ if (!cpu->timers.t1)
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+ panic("Timer1 is not present!\n");
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+
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+ if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc)
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+ panic("RTSC is not present\n");
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#ifdef CONFIG_ARC_HAS_DCCM
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/*
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@@ -256,33 +270,20 @@ static void arc_chk_ccms(void)
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if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
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panic("Linux built with incorrect ICCM Size\n");
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#endif
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-#endif
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-}
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-/*
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- * Ensure that FP hardware and kernel config match
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- * -If hardware contains DPFP, kernel needs to save/restore FPU state
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- * across context switches
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- * -If hardware lacks DPFP, but kernel configured to save FPU state then
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- * kernel trying to access non-existant DPFP regs will crash
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- *
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- * We only check for Dbl precision Floating Point, because only DPFP
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- * hardware has dedicated regs which need to be saved/restored on ctx-sw
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- * (Single Precision uses core regs), thus kernel is kind of oblivious to it
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- */
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-static void arc_chk_fpu(void)
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-{
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- struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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+ /*
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+ * FP hardware/software config sanity
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+ * -If hardware contains DPFP, kernel needs to save/restore FPU state
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+ * -If not, it will crash trying to save/restore the non-existant regs
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+ *
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+ * (only DPDP checked since SP has no arch visible regs)
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+ */
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+ fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
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- if (cpu->dpfp.ver) {
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-#ifndef CONFIG_ARC_FPU_SAVE_RESTORE
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- pr_warn("DPFP support broken in this kernel...\n");
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|
-#endif
|
|
|
- } else {
|
|
|
-#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
|
|
|
- panic("H/w lacks DPFP support, apps won't work\n");
|
|
|
-#endif
|
|
|
- }
|
|
|
+ if (cpu->extn.fpu_dp && !fpu_enabled)
|
|
|
+ pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
|
|
|
+ else if (!cpu->extn.fpu_dp && fpu_enabled)
|
|
|
+ panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
|
|
|
}
|
|
|
|
|
|
/*
|
|
@@ -303,15 +304,11 @@ void setup_processor(void)
|
|
|
|
|
|
arc_mmu_init();
|
|
|
arc_cache_init();
|
|
|
- arc_chk_ccms();
|
|
|
|
|
|
printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
|
|
|
-
|
|
|
-#ifdef CONFIG_SMP
|
|
|
printk(arc_platform_smp_cpuinfo());
|
|
|
-#endif
|
|
|
|
|
|
- arc_chk_fpu();
|
|
|
+ arc_chk_core_config();
|
|
|
}
|
|
|
|
|
|
static inline int is_kernel(unsigned long addr)
|
|
@@ -360,11 +357,7 @@ void __init setup_arch(char **cmdline_p)
|
|
|
machine_desc->init_early();
|
|
|
|
|
|
setup_processor();
|
|
|
-
|
|
|
-#ifdef CONFIG_SMP
|
|
|
smp_init_cpus();
|
|
|
-#endif
|
|
|
-
|
|
|
setup_arch_memory();
|
|
|
|
|
|
/* copy flat DT out of .init and then unflatten it */
|
|
@@ -385,7 +378,13 @@ void __init setup_arch(char **cmdline_p)
|
|
|
|
|
|
static int __init customize_machine(void)
|
|
|
{
|
|
|
- /* Add platform devices */
|
|
|
+ of_clk_init(NULL);
|
|
|
+ /*
|
|
|
+ * Traverses flattened DeviceTree - registering platform devices
|
|
|
+ * (if any) complete with their resources
|
|
|
+ */
|
|
|
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
|
|
+
|
|
|
if (machine_desc->init_machine)
|
|
|
machine_desc->init_machine();
|
|
|
|
|
@@ -419,19 +418,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
|
|
|
|
|
|
seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
|
|
|
|
- seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
|
|
|
+ seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
|
|
|
loops_per_jiffy / (500000 / HZ),
|
|
|
(loops_per_jiffy / (5000 / HZ)) % 100);
|
|
|
|
|
|
seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
|
-
|
|
|
seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
|
-
|
|
|
seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
|
-
|
|
|
-#ifdef CONFIG_SMP
|
|
|
seq_printf(m, arc_platform_smp_cpuinfo());
|
|
|
-#endif
|
|
|
|
|
|
free_page((unsigned long)str);
|
|
|
done:
|