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@@ -14,7 +14,6 @@ DEF_NATIVE(pv_cpu_ops, clts, "clts");
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DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
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DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
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DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
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DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
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-DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl");
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DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
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DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
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DEF_NATIVE(, mov32, "mov %edi, %eax");
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DEF_NATIVE(, mov32, "mov %edi, %eax");
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@@ -54,7 +53,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
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PATCH_SITE(pv_irq_ops, save_fl);
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PATCH_SITE(pv_irq_ops, save_fl);
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PATCH_SITE(pv_irq_ops, irq_enable);
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PATCH_SITE(pv_irq_ops, irq_enable);
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PATCH_SITE(pv_irq_ops, irq_disable);
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PATCH_SITE(pv_irq_ops, irq_disable);
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- PATCH_SITE(pv_cpu_ops, usergs_sysret32);
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PATCH_SITE(pv_cpu_ops, usergs_sysret64);
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PATCH_SITE(pv_cpu_ops, usergs_sysret64);
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PATCH_SITE(pv_cpu_ops, swapgs);
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PATCH_SITE(pv_cpu_ops, swapgs);
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PATCH_SITE(pv_mmu_ops, read_cr2);
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PATCH_SITE(pv_mmu_ops, read_cr2);
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