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@@ -1892,7 +1892,7 @@ static int tsi148_dma_busy(struct vme_bridge *tsi148_bridge, int channel)
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static int tsi148_dma_list_exec(struct vme_dma_list *list)
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{
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struct vme_dma_resource *ctrlr;
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- int channel, retval = 0;
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+ int channel, retval;
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struct tsi148_dma_entry *entry;
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u32 bus_addr_high, bus_addr_low;
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u32 val, dctlreg = 0;
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@@ -1942,9 +1942,19 @@ static int tsi148_dma_list_exec(struct vme_dma_list *list)
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iowrite32be(dctlreg | TSI148_LCSR_DCTL_DGO, bridge->base +
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TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL);
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- wait_event_interruptible(bridge->dma_queue[channel],
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+ retval = wait_event_interruptible(bridge->dma_queue[channel],
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tsi148_dma_busy(ctrlr->parent, channel));
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+ if (retval) {
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+ iowrite32be(dctlreg | TSI148_LCSR_DCTL_ABT, bridge->base +
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+ TSI148_LCSR_DMA[channel] + TSI148_LCSR_OFFSET_DCTL);
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+ /* Wait for the operation to abort */
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+ wait_event(bridge->dma_queue[channel],
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+ tsi148_dma_busy(ctrlr->parent, channel));
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+ retval = -EINTR;
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+ goto exit;
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+ }
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+
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/*
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* Read status register, this register is valid until we kick off a
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* new transfer.
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@@ -1957,6 +1967,7 @@ static int tsi148_dma_list_exec(struct vme_dma_list *list)
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retval = -EIO;
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}
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+exit:
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/* Remove list from running list */
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mutex_lock(&ctrlr->mtx);
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list_del(&list->list);
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