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@@ -420,11 +420,9 @@ static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
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MAX77620_REG_GPIO0 + pin,
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MAX77620_REG_GPIO0 + pin,
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MAX77620_CNFG_GPIO_DRV_MASK,
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MAX77620_CNFG_GPIO_DRV_MASK,
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val);
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val);
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- if (ret < 0) {
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- dev_err(dev, "Reg 0x%02x update failed %d\n",
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- MAX77620_REG_GPIO0 + pin, ret);
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- return ret;
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- }
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+ if (ret)
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+ goto report_update_failure;
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+
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mpci->pin_info[pin].drv_type = val ?
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mpci->pin_info[pin].drv_type = val ?
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MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
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MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
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break;
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break;
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@@ -435,11 +433,9 @@ static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
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MAX77620_REG_GPIO0 + pin,
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MAX77620_REG_GPIO0 + pin,
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MAX77620_CNFG_GPIO_DRV_MASK,
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MAX77620_CNFG_GPIO_DRV_MASK,
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val);
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val);
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- if (ret < 0) {
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- dev_err(dev, "Reg 0x%02x update failed %d\n",
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- MAX77620_REG_GPIO0 + pin, ret);
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- return ret;
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- }
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+ if (ret)
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+ goto report_update_failure;
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+
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mpci->pin_info[pin].drv_type = val ?
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mpci->pin_info[pin].drv_type = val ?
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MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
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MAX77620_PIN_PP_DRV : MAX77620_PIN_OD_DRV;
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break;
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break;
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@@ -536,6 +532,11 @@ static int max77620_pinconf_set(struct pinctrl_dev *pctldev,
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}
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}
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return 0;
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return 0;
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+
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+report_update_failure:
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+ dev_err(dev, "Reg 0x%02x update failed %d\n",
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+ MAX77620_REG_GPIO0 + pin, ret);
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+ return ret;
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}
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}
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static const struct pinconf_ops max77620_pinconf_ops = {
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static const struct pinconf_ops max77620_pinconf_ops = {
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