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@@ -64,6 +64,14 @@ static const struct pci_device_id ath10k_pci_id_table[] = {
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{0}
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{0}
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};
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};
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+static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
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+ /* QCA988X pre 2.0 chips are not supported because they need some nasty
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+ * hacks. ath10k doesn't have them and these devices crash horribly
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+ * because of that.
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+ */
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+ { QCA988X_2_0_DEVICE_ID, QCA988X_HW_2_0_CHIP_ID_REV },
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+};
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+
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static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
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static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
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static int ath10k_pci_cold_reset(struct ath10k *ar);
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static int ath10k_pci_cold_reset(struct ath10k *ar);
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static int ath10k_pci_warm_reset(struct ath10k *ar);
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static int ath10k_pci_warm_reset(struct ath10k *ar);
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@@ -2476,6 +2484,23 @@ static void ath10k_pci_release(struct ath10k *ar)
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pci_disable_device(pdev);
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pci_disable_device(pdev);
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}
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}
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+static bool ath10k_pci_chip_is_supported(u32 dev_id, u32 chip_id)
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+{
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+ const struct ath10k_pci_supp_chip *supp_chip;
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+ int i;
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+ u32 rev_id = MS(chip_id, SOC_CHIP_ID_REV);
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+
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+ for (i = 0; i < ARRAY_SIZE(ath10k_pci_supp_chips); i++) {
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+ supp_chip = &ath10k_pci_supp_chips[i];
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+
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+ if (supp_chip->dev_id == dev_id &&
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+ supp_chip->rev_id == rev_id)
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+ return true;
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+ }
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+
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+ return false;
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+}
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+
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static int ath10k_pci_probe(struct pci_dev *pdev,
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static int ath10k_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *pci_dev)
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const struct pci_device_id *pci_dev)
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{
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{
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@@ -2521,6 +2546,12 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
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goto err_sleep;
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goto err_sleep;
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}
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}
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+ if (!ath10k_pci_chip_is_supported(pdev->device, chip_id)) {
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+ ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n",
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+ pdev->device, chip_id);
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+ goto err_sleep;
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+ }
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+
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ret = ath10k_pci_alloc_pipes(ar);
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ret = ath10k_pci_alloc_pipes(ar);
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if (ret) {
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if (ret) {
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ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",
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ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",
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