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@@ -638,7 +638,47 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
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return ret;
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intel_runtime_pm_get(dev_priv);
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- if (INTEL_INFO(dev)->gen >= 8) {
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+ if (IS_CHERRYVIEW(dev)) {
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+ int i;
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+ seq_printf(m, "Master Interrupt Control:\t%08x\n",
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+ I915_READ(GEN8_MASTER_IRQ));
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+
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+ seq_printf(m, "Display IER:\t%08x\n",
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+ I915_READ(VLV_IER));
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+ seq_printf(m, "Display IIR:\t%08x\n",
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+ I915_READ(VLV_IIR));
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+ seq_printf(m, "Display IIR_RW:\t%08x\n",
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+ I915_READ(VLV_IIR_RW));
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+ seq_printf(m, "Display IMR:\t%08x\n",
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+ I915_READ(VLV_IMR));
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+ for_each_pipe(pipe)
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+ seq_printf(m, "Pipe %c stat:\t%08x\n",
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+ pipe_name(pipe),
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+ I915_READ(PIPESTAT(pipe)));
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+
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+ seq_printf(m, "Port hotplug:\t%08x\n",
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+ I915_READ(PORT_HOTPLUG_EN));
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+ seq_printf(m, "DPFLIPSTAT:\t%08x\n",
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+ I915_READ(VLV_DPFLIPSTAT));
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+ seq_printf(m, "DPINVGTT:\t%08x\n",
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+ I915_READ(DPINVGTT));
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+
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+ for (i = 0; i < 4; i++) {
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+ seq_printf(m, "GT Interrupt IMR %d:\t%08x\n",
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+ i, I915_READ(GEN8_GT_IMR(i)));
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+ seq_printf(m, "GT Interrupt IIR %d:\t%08x\n",
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+ i, I915_READ(GEN8_GT_IIR(i)));
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+ seq_printf(m, "GT Interrupt IER %d:\t%08x\n",
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+ i, I915_READ(GEN8_GT_IER(i)));
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+ }
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+
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+ seq_printf(m, "PCU interrupt mask:\t%08x\n",
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+ I915_READ(GEN8_PCU_IMR));
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+ seq_printf(m, "PCU interrupt identity:\t%08x\n",
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+ I915_READ(GEN8_PCU_IIR));
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+ seq_printf(m, "PCU interrupt enable:\t%08x\n",
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+ I915_READ(GEN8_PCU_IER));
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+ } else if (INTEL_INFO(dev)->gen >= 8) {
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seq_printf(m, "Master Interrupt Control:\t%08x\n",
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I915_READ(GEN8_MASTER_IRQ));
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